Inventor

CHOI JOO-SUN

KR35 patents

⚠️ This page may combine multiple inventors who share the name “CHOI JOO-SUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHOI JOO-SUN

SAMSUNG ELECTRONICS CO LTD

Memory system for controlling power and method thereof

Apparatus and method for controlling refresh of semiconductor memory device according to positional information of memory chips

Semiconductor memory device performing a refresh operation, and memory system including the same

Memory system having low power consumption

Memory system having point-to-point (PTP) and point-to-two-point (PTTP) links between devices

Memory modules and memory systems having the same

Memory system having point-to-point (PTP) and point-to-two-point (PTTP) links between devices

Memory modules and memory systems having the same

Refresh method, refresh address generator, volatile memory device including the same

Memory system, and a method of controlling an operation thereof

Dynamic output buffer circuit

Input/output (IO) interface and method of transmitting IO data

Phase-locked-loop circuit including digitally-controlled oscillator

Memory chip, memory system, and method of accessing the memory chip

Memory system and method having point-to-point link

Reconfigurable input/output in hierarchical memory link

Memory device, memory system and method of inputting/outputting data into/from the same

Semiconductor memory device and method for controlling clock latency according to reordering of burst data

HYUNDAI ELECTRONICS IND

Synchronous semiconductor memory device with a plurality of memory modules which has an additional function for masking a data strobe signal outputted from each memory module

Antifuse circuitry for post-package DRAM repair

Composite mode substrate voltage generation circuit for dynamic random access memory

CSP pin configuration compatible with TSOP pin configuration

YU HAK-SOO

Semiconductor memory device capable of screening a weak bit and repairing the same

Bad page management in memory device or system

Semiconductor memory device storing memory characteristic information, memory module and memory system having the same, and operating method thereof

PARK CHUL-WOO

Memory circuits, systems, and modules for performing DRAM refresh operations and methods of operating the same

Method of refreshing a memory device, refresh address generator and memory device

HYNIX SEMICONDUCTOR INC

Refresh mechanism in dynamic memories

Ring-resister controlled DLL with fine delay line and direct skew sensing detector

KANG UK-SONG

Semiconductor memory device

SHIN CHOONG-SUN

Integrated circuit memory device

PARK CHUL SUNG

Memory chip, memory system, and method of accessing the memory chip

KIM JUNG-SIK

Semiconductor memory device having improved refresh characteristics

CHOI JOO-SUN

Reconfigurable input/output in hierarchical memory link

CHUNG HOE-JU

Data parallelizing receiver