Inventor
BRIGGS BENJAMIN DAVID
US23 patents
⚠️ This page may combine multiple inventors who share the name “BRIGGS BENJAMIN DAVID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
14 patentsUS9953865B1Apr 24, 2018
Structure and method to improve FAV RIE process margin and electromigration
IBM23 citations94
US10366952B2Jul 30, 2019
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
IBM5 citations84
US10109579B2Oct 23, 2018
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
IBM8 citations84
US9997451B2Jun 12, 2018
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
IBM5 citations84
US9780035B1Oct 3, 2017
Structure and method for improved stabilization of cobalt cap and/or cobalt liner in interconnects
IBM10 citations83
US10559498B2Feb 11, 2020
Location-specific laser annealing to improve interconnect microstructure
IBM2 citations73
US10366920B2Jul 30, 2019
Location-specific laser annealing to improve interconnect microstructure
IBM2 citations73
US10150323B2Dec 11, 2018
Structure, system, method, and recording medium of implementing a directed self-assembled security pattern
IBM1 citations63
US10770348B2Sep 8, 2020
Location-specific laser annealing to improve interconnect microstructure
IBM0 citations52
US10752039B2Aug 25, 2020
Structure of implementing a directed self-assembled security pattern
IBM0 citations52
US10315451B2Jun 11, 2019
Structure, system, method, and recording medium of implementing a directed self-assembled security pattern
IBM0 citations52
US10134674B2Nov 20, 2018
Structure and method for improved stabilization of cobalt cap and/or cobalt liner in interconnects
IBM0 citations51
US10785590B2Sep 22, 2020
Binaural audio calibration
IBM0 citations47
US10492019B2Nov 26, 2019
Binaural audio calibration
IBM0 citations47
TESSERA INC
5 patentsUS11056429B2Jul 6, 2021
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
TESSERA INC4 citations84
US10629529B2Apr 21, 2020
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
TESSERA INC3 citations84
US10985056B2Apr 20, 2021
Structure and method to improve FAV RIE process margin and Electromigration
TESSERA INC2 citations73
US10964588B2Mar 30, 2021
Selective ILD deposition for fully aligned via with airgap
TESSERA INC2 citations73
US10957584B2Mar 23, 2021
Structure and method to improve FAV RIE process margin and electromigration
TESSERA INC1 citations73
ADEIA SEMICONDUCTOR SOLUTIONS LLC
2 patentsUS11955424B2Apr 9, 2024
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
ADEIA SEMICONDUCTOR SOLUTIONS LLC1 citations73
US12550709B2Feb 10, 2026
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
ADEIA SEMICONDUCTOR SOLUTIONS LLC0 citations62