Inventor

CHEN CHI-CHUN

TW57 patents

⚠️ This page may combine multiple inventors who share the name “CHEN CHI-CHUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN CHI-CHUN

TAIWAN SEMICONDUCTOR MFG

Dual gate dielectric scheme: SiON for high performance devices and high k for low power devices

Dual gate dielectric scheme: SiON for high performance devices and high k for low power devices

Method of forming a nitride gate dielectric layer for advanced CMOS devices

Method for forming metal gates in a gate last process

Method and structure for forming high-k gates

Dual-gate structure and method of fabricating integrated circuits having dual-gate structures

Method for manufacturing a thin gate dielectric layer for integrated circuit fabrication

High selectivity etching process for metal gate N/P patterning

Adjustment of N and K values in a DARC film

Methods for improving within-wafer uniformity of gate oxide

Method and system for determining a component concentration of an integrated circuit feature

Method of forming dual gate insulator layers for CMOS applications

Shallow junction formation and high dopant activation rate of MOS devices

Gate dielectric layers and methods of fabricating gate dielectric layers

Methods for fabricating a semiconductor device

Multiple-time flash anneal process

Method to reduce defect/slurry residue for copper CMP

Method for forming composite dielectric layer

Method of forming a uniform ultra-thin gate oxide layer

Method of patterning a metal gate of semiconductor device

Method for patterning a metal gate

Dual-gate structure and method of fabricating integrated circuits having dual-gate structures

Electron mobility enhancement for MOS devices with nitrided polysilicon re-oxidation

Method of patterning a metal gate of semiconductor device

Method of patterning a metal gate of semiconductor device

Surface preparation for gate oxide formation that avoids chemical oxide formation

High temperature hydrogen annealing of a gate insulator layer to increase etching selectivity between conductive gate structure and gate insulator layer

GOGORO INC

Battery charger

Battery charger

Systems and apparatus for charging portable electrical energy storage devices

NAT SCIENCE COUNCIL

Method of forming a gate oxide layer with an improved ability to resist the process damage

Method of improving a dual gate CMOS transistor to resist the boron-penetrating effect

IND TECH RES INST

Packet forwarding apparatus and method for virtualization switch

Remote management systems and apparatuses for CWMP and methods for improving performance of remote management thereof

CHICONY POWER TECH CO LTD

Low-power-consumption protection circuit

Power converter

YU SAN

Vertical structure LED current spreading by implanted regions

Bond pad isolation and current confinement in an LED using ion implantation

GODET LUDOVIC

Method of etching a workpiece

KWAK JOON SEOP

LED with uniform current spreading and method of fabrication

LEE DA-YUAN

Fabricating high-K/metal gate devices in a gate last process

NAT UNIV CHIN YI TECHNOLOGY

Multi-protocol determining method based on CAN bus

JIANG TAO

Integration of current blocking layer and n-GaN contact doping by implantation

YEH MATT

Gate oxide leakage reduction

ASUSTEK COMP INC

Fan control system

EVANS MORGAN D

Heteroepitaxial growth using ion implantation

HOU TOU-HUNG

Dual gate dielectric scheme: SiON for high performance devices and high K for low power devices

CHEN CHI-CHUN

System and method for transmitting network packets adapted for multimedia streams

TEO JOCELYN WEI-YEE

Pre-gate dielectric process using hydrogen annealing

NIEH CHUN-FENG

Shallow junction formation and high dopant activation rate of MOS devices