Inventor
BRITTAIN MARK A
US13 patents
⚠️ This page may combine multiple inventors who share the name “BRITTAIN MARK A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
10 patentsUS7587559B2Sep 8, 2009
Systems and methods for memory module power management
IBM63 citations98
US7930469B2Apr 19, 2011
System to provide memory system power reduction without reducing overall memory system performance
IBM9 citations84
US7930470B2Apr 19, 2011
System to enable a memory hub device to manage thermal conditions at a memory device level transparent to a memory controller
IBM17 citations84
US7925824B2Apr 12, 2011
System to reduce latency by running a memory channel frequency fully asynchronous from a memory device frequency
IBM7 citations84
US6904585B2Jun 7, 2005
Method for identification and removal of non-timing critical wire routes from congestion region
IBM13 citations81
US8996824B2Mar 31, 2015
Memory reorder queue biasing preceding high latency operations
IBM2 citations62
US7925826B2Apr 12, 2011
System to increase the overall bandwidth of a memory channel by allowing the memory channel to operate at a frequency independent from a memory device frequency
IBM4 citations62
US7925825B2Apr 12, 2011
System to support a full asynchronous interface within a memory hub device
IBM2 citations62
US7571357B2Aug 4, 2009
Memory wrap test mode using functional read/write buffers
IBM1 citations51
US8543759B2Sep 24, 2013
Method for scheduling memory refresh operations including power states
IBM0 citations48
BRITTAIN MARK A
3 patentsUS9632954B2Apr 25, 2017
Memory queue handling techniques for reducing impact of high-latency memory operations
BRITTAIN MARK A2 citations71
US8909874B2Dec 9, 2014
Memory reorder queue biasing preceding high latency operations
BRITTAIN MARK A5 citations71
US8539146B2Sep 17, 2013
Apparatus for scheduling memory refresh operations including power states
BRITTAIN MARK A0 citations50