Inventor

LAUNSBACH MICHAEL

US19 patents

⚠️ This page may combine multiple inventors who share the name “LAUNSBACH MICHAEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LAUNSBACH MICHAEL

IBM

Power management SRAM write bit line drive circuit

Power management domino SRAM bit line discharge circuit

Precise time period measurement

Dual mode analog differential and CMOS logic circuit

Partial update in a ternary content addressable memory

Data security for dynamic random access memory using body bias to clear data at power-up

Level shifter for a time-varying input

Level shifter for a time-varying input

Partial update in a ternary content addressable memory

Integrated decoupling capacitor utilizing through-silicon via

Integrated decoupling capacitor utilizing through-silicon via

Layout to minimize FET variation in small dimension photolithography

BEHRENDS DERICK G

Implementing mulitple mask lithography timing variation mitigation

Data dependent SRAM write assist

Implementing power saving self powering down latch structure

Implementing RC and coupling delay correction for SRAM

Single cycle data copy for two-port SRAM

BEHRENDS DERICK GARDNER

Data security for dynamic random access memory using body bias to clear data at power-up

Layout to minimize FET variation in small dimension photolithography