Inventor

GOLOV OREN

IL39 patents

⚠️ This page may combine multiple inventors who share the name “GOLOV OREN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GOLOV OREN

APPLE INC

Adaptive estimation of memory cell read thresholds

Efficient readout from memory cells using data compression

Automatic defect management in memory devices

Adaptive estimation of memory cell read thresholds

Efficient readout from memory cells using data compression

Efficient enforcement of command execution order in solid state drives

Selection of redundant storage configuration based on available memory space

Memory management schemes for non-volatile memory devices

Independent management of data and parity logical block addresses

Reuse of host hibernation storage space by memory controller

Memory management schemes for non-volatile memory devices

Selection of redundant storage configuration based on available memory space

Hierarchical data storage system

SHALVI OFIR

Automatic defect management in memory devices

Reliable data storage in analog memory cells subjected to long retention periods

Data storage with incremental redundancy

Programming orders for reducing distortion in arrays of multi-level analog memory cells

Estimation of non-linear distortion in memory devices

Segmented data storage

Programming orders for reducing distortion based on neighboring rows

Reducing distortion using joint storage

PERLMUTTER URI

Efficient readout from analog memory cells using data compression

Estimation of memory cell read thresholds by sampling inside programming level distribution intervals

Efficient interference cancellation in analog memory cell arrays

Efficient readout from analog memory cells using data compression

SOMMER NAFTALI

Data scrambling schemes for memory devices

Data scrambling in memory devices

Data scrambling schemes for memory devices

MEIR AVRAHAM

Memory management schemes for non-volatile memory devices

Independent management of data and parity logical block addresses

ANOBIT TECHNOLOGIES LTD

Estimation of memory cell read thresholds by sampling inside programming level distribution intervals

Programming of analog memory cells using a single programming pulse per state transition

GOLOV OREN

Wear level estimation in analog memory cells

Redundant storage in non-volatile memory by storing redundancy information in volatile memory

ZALTSMAN ETAI

Efficient enforcement of command execution order in solid state drives

SHACHAR MICHAEL

Memory system including a controller and processors associated with memory devices

SALOMON TAVI

Reuse of host hibernation storage space by memory controller

SANDEL ERAN

Adaptive mapping of logical addresses to memory devices in solid state drives

KATZ SHACHAR

Optimized execution of interleaved write operations in solid state drives