Inventor
MOHANTY NIHAR
US27 patents
⚠️ This page may combine multiple inventors who share the name “MOHANTY NIHAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TOKYO ELECTRON LTD
26 patentsUS10354873B2Jul 16, 2019
Organic mandrel protection process
TOKYO ELECTRON LTD340 citations98
US10529830B2Jan 7, 2020
Extension region for a semiconductor device
TOKYO ELECTRON LTD16 citations94
US9997598B2Jun 12, 2018
Three-dimensional semiconductor device and method of fabrication
TOKYO ELECTRON LTD26 citations94
US9786503B2Oct 10, 2017
Method for increasing pattern density in self-aligned patterning schemes without using hard masks
TOKYO ELECTRON LTD45 citations93
US10930764B2Feb 23, 2021
Extension region for a semiconductor device
TOKYO ELECTRON LTD6 citations84
US10256140B2Apr 9, 2019
Method of reducing overlay error in via to grid patterning
TOKYO ELECTRON LTD2 citations73
US10256110B2Apr 9, 2019
Self-aligned patterning process utilizing self-aligned blocking and spacer self-healing
TOKYO ELECTRON LTD2 citations73
US9812325B2Nov 7, 2017
Method for modifying spacer profile
TOKYO ELECTRON LTD3 citations73
US9748110B2Aug 29, 2017
Method and system for selective spacer etch for multi-patterning schemes
TOKYO ELECTRON LTD4 citations72
US10971372B2Apr 6, 2021
Gas phase etch with controllable etch selectivity of Si-containing arc or silicon oxynitride to different films or masks
TOKYO ELECTRON LTD2 citations71
US10319637B2Jun 11, 2019
Method for fully self-aligned via formation using a directed self assembly (DSA) process
TOKYO ELECTRON LTD5 citations71
US9991133B2Jun 5, 2018
Method for etch-based planarization of a substrate
TOKYO ELECTRON LTD3 citations69
US9520270B2Dec 13, 2016
Direct current superposition curing for resist reflow temperature enhancement
TOKYO ELECTRON LTD2 citations63
US11333968B2May 17, 2022
Method for reducing lithography defects and pattern transfer
TOKYO ELECTRON LTD0 citations62
US10580650B2Mar 3, 2020
Method for bottom-up formation of a film in a recessed feature
TOKYO ELECTRON LTD1 citations62
US10366890B2Jul 30, 2019
Method for patterning a substrate using a layer with multiple materials
TOKYO ELECTRON LTD1 citations62
US10236186B2Mar 19, 2019
Methods for dry hard mask removal on a microelectronic substrate
TOKYO ELECTRON LTD1 citations62
US11538691B2Dec 27, 2022
Gas phase etch with controllable etch selectivity of Si-containing arc or silicon oxynitride to different films or masks
TOKYO ELECTRON LTD0 citations61
US11380554B2Jul 5, 2022
Gas phase etching system and method
TOKYO ELECTRON LTD0 citations61
US12265326B2Apr 1, 2025
Method for reducing lithography defects and pattern transfer
TOKYO ELECTRON LTD0 citations56
US10141183B2Nov 27, 2018
Methods of spin-on deposition of metal oxides
TOKYO ELECTRON LTD1 citations52
US10083842B2Sep 25, 2018
Methods of sub-resolution substrate patterning
TOKYO ELECTRON LTD1 citations52
US9478435B2Oct 25, 2016
Method for directed self-assembly and pattern curing
TOKYO ELECTRON LTD1 citations52
US10935889B2Mar 2, 2021
Extreme ultra-violet sensitivity reduction using shrink and growth method
TOKYO ELECTRON LTD0 citations51
US10580660B2Mar 3, 2020
Gas phase etching system and method
TOKYO ELECTRON LTD0 citations51
US10049892B2Aug 14, 2018
Method for processing photoresist materials and structures
TOKYO ELECTRON LTD1 citations50