Inventor
FEI XIAOLONG
CN10 patents
⚠️ This page may combine multiple inventors who share the name “FEI XIAOLONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD
6 patentsUS10853080B2Dec 1, 2020
System and method of merging partial write results for resolving renaming size issues
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations39
US10860327B2Dec 8, 2020
Methods for scheduling that determine whether to remove a dependent micro-instruction from a reservation station queue based on determining a cache hit/miss status of a load micro-instruction once a count reaches a predetermined value and an apparatus using the same
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations37
US10747542B2Aug 18, 2020
Load store dependency predictor using separate alias tables for store address instructions and store data instructions
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations37
US10705851B2Jul 7, 2020
Scheduling that determines whether to remove a dependent micro-instruction from a reservation station queue based on determining cache hit/miss status of one ore more load micro-instructions once a count reaches a predetermined value
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations37
US10509655B1Dec 17, 2019
Processor circuit and operation method thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations37
US10776116B2Sep 15, 2020
Instruction translation circuit, processor circuit and executing method thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations30
VIA ALLIANCE SEMICONDUCTOR CO LTD
3 patentsUS10203957B2Feb 12, 2019
Processor with improved alias queue and store collision detection to reduce memory violations and load replays
VIA ALLIANCE SEMICONDUCTOR CO LTD2 citations69
US10248425B2Apr 2, 2019
Processor with slave free list that handles overflow of recycled physical registers and method of recycling physical registers in a processor using a slave free list
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations37
US10042646B2Aug 7, 2018
System and method of merging partial write result during retire phase
VIA ALLIANCE SEMICONDUCTOR CO LTD0 citations37