Inventor
PALLE DHARMENDAR
US10 patents
Patents
10 patentsUS10566330B2Feb 18, 2020
Dielectric separation of partial GAA FETs
SAMSUNG ELECTRONICS CO LTD10 citations82
US11552067B2Jan 10, 2023
Semiconductor cell blocks having non-integer multiple of cell heights
SAMSUNG ELECTRONICS CO LTD2 citations70
US11182686B2Nov 23, 2021
4T4R ternary weight cell with high on/off ratio background
SAMSUNG ELECTRONICS CO LTD0 citations62
US11556768B2Jan 17, 2023
Optimization of sparsified neural network layers for semi-digital crossbar architectures
SAMSUNG ELECTRONICS CO LTD0 citations61
US11475933B2Oct 18, 2022
Variation mitigation scheme for semi-digital mac array with a 2T-2 resistive memory element bitcell
SAMSUNG ELECTRONICS CO LTD0 citations61
US11101320B2Aug 24, 2021
System and method for efficient enhancement of an on/off ratio of a bitcell based on 3T2R binary weight cell with spin orbit torque MJTs (SOT-MTJs)
SAMSUNG ELECTRONICS CO LTD1 citations61
US11217392B2Jan 4, 2022
Composite piezoelectric capacitor
SAMSUNG ELECTRONICS CO LTD0 citations51
US10872662B2Dec 22, 2020
2T2R binary weight cell with high on/off ratio background
SAMSUNG ELECTRONICS CO LTD0 citations51
US10832774B2Nov 10, 2020
Variation resistant 3T3R binary weight cell with low output current and high on/off ratio
SAMSUNG ELECTRONICS CO LTD0 citations51
US12080703B2Sep 3, 2024
Semiconductor cell blocks having non-integer multiple of cell heights
SAMSUNG ELECTRONICS CO LTD0 citations49