Inventor
SUN ZHUOWEN
US45 patents
⚠️ This page may combine multiple inventors who share the name “SUN ZHUOWEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INVENSAS CORP
41 patentsUS9812402B2Nov 7, 2017
Wire bond wires for interference shielding
INVENSAS CORP30 citations97
US10115678B2Oct 30, 2018
Wire bond wires for interference shielding
INVENSAS CORP26 citations94
US9397038B1Jul 19, 2016
Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates
INVENSAS CORP27 citations94
US9349707B1May 24, 2016
Contact arrangements for stackable microelectronic package structures with multiple ranks
INVENSAS CORP29 citations94
US9984992B2May 29, 2018
Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
INVENSAS CORP27 citations93
US10559537B2Feb 11, 2020
Wire bond wires for interference shielding
INVENSAS CORP10 citations92
US9490222B1Nov 8, 2016
Wire bond wires for interference shielding
INVENSAS CORP20 citations92
US10354976B2Jul 16, 2019
Dies-on-package devices and methods therefor
INVENSAS CORP6 citations84
US10032715B2Jul 24, 2018
Ultra high performance interposer
INVENSAS CORP4 citations84
US9991233B2Jun 5, 2018
Package-on-package devices with same level WLP components and methods therefor
INVENSAS CORP5 citations84
US9991235B2Jun 5, 2018
Package on-package devices with upper RDL of WLPS and methods therefor
INVENSAS CORP5 citations84
US9972609B2May 15, 2018
Package-on-package devices with WLP components with dual RDLs for surface mount dies and methods therefor
INVENSAS CORP8 citations84
US9728524B1Aug 8, 2017
Enhanced density assembly having microelectronic packages mounted at substantial angle to board
INVENSAS CORP7 citations84
US9666521B2May 30, 2017
Ultra high performance interposer
INVENSAS CORP5 citations84
US9640282B1May 2, 2017
Flexible I/O partition of multi-die memory solution
INVENSAS CORP8 citations84
US9484080B1Nov 1, 2016
High-bandwidth memory application with controlled impedance loading
INVENSAS CORP8 citations84
US9402312B2Jul 26, 2016
Circuit assemblies with multiple interposer substrates, and methods of fabrication
INVENSAS CORP11 citations84
US10325877B2Jun 18, 2019
Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
INVENSAS CORP7 citations82
US9985007B2May 29, 2018
Package on-package devices with multiple levels and methods therefor
INVENSAS CORP3 citations73
US9972573B2May 15, 2018
Wafer-level packaged components and methods therefor
INVENSAS CORP3 citations73
US9928883B2Mar 27, 2018
TFD I/O partition for high-speed, high-density applications
INVENSAS CORP2 citations73
US9640236B2May 2, 2017
Reduced load memory module using wire bonds and a plurality of rank signals
INVENSAS CORP3 citations73
US9595511B1Mar 14, 2017
Microelectronic packages and assemblies with improved flyby signaling operation
INVENSAS CORP3 citations73
US9583417B2Feb 28, 2017
Via structure for signal equalization
INVENSAS CORP3 citations73
US9337170B1May 10, 2016
Contact arrangements for stackable microelectronic package structures
INVENSAS CORP3 citations73
US9691702B2Jun 27, 2017
Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates
INVENSAS CORP1 citations63
US10700002B2Jun 30, 2020
Ultra high performance interposer
INVENSAS CORP0 citations52
US10522457B2Dec 31, 2019
Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates
INVENSAS CORP0 citations52
US10332833B2Jun 25, 2019
Ultra high performance interposer
INVENSAS CORP0 citations52
US10177086B2Jan 8, 2019
Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates
INVENSAS CORP0 citations52
US10103093B2Oct 16, 2018
Via structure for signal equalization
INVENSAS CORP0 citations52
US10026467B2Jul 17, 2018
High-bandwidth memory application with controlled impedance loading
INVENSAS CORP0 citations52
US10007622B2Jun 26, 2018
Method for reduced load memory module
INVENSAS CORP0 citations52
US9947618B2Apr 17, 2018
Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates
INVENSAS CORP0 citations52
US9905507B2Feb 27, 2018
Circuit assemblies with multiple interposer substrates, and methods of fabrication
INVENSAS CORP0 citations52
US9679613B1Jun 13, 2017
TFD I/O partition for high-speed, high-density applications
INVENSAS CORP1 citations52
US9460758B2Oct 4, 2016
Single package dual channel memory with co-support
INVENSAS CORP0 citations52
US9281296B2Mar 8, 2016
Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design
INVENSAS CORP1 citations52
US9070423B2Jun 30, 2015
Single package dual channel memory with co-support
INVENSAS CORP0 citations52
US9691437B2Jun 27, 2017
Compact microelectronic assembly having reduced spacing between controller and memory packages
INVENSAS CORP0 citations42
US9343398B2May 17, 2016
BGA ballout partition techniques for simplified layout in motherboard with multiple power supply rail
INVENSAS CORP0 citations42