Inventor

TAILLIET FRANÇOIS

FR75 patents

⚠️ This page may combine multiple inventors who share the name “TAILLIET FRANÇOIS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAILLIET FRANÇOIS

ST MICROELECTRONICS ROUSSET

Compact EEPROM memory cell with a gate dielectric layer having two different thicknesses

Non-volatile memory device having a memory size

Method for writing in an EEPROM memory and corresponding device

Low-dispersion component in an electronic chip

Low-dispersion component in an electronic chip

Compact EEPROM memory cell with a gate dielectric layer having two different thicknesses

Communication on an I2C bus

Compact EEPROM memory cell with a gate dielectric layer having two different thicknesses

Overvoltage protection

MOS transistors in parallel

Compact memory device including a SRAM memory plane and a non volatile memory plane, and operating methods

Low-dispersion component in an electronic chip

Non volatile static random access memory device and corresponding control method

Non volatile static random access memory device and corresponding control method

Compact non-volatile memory device

Method for writing in EEPROM memory and corresponding integrated circuit

Compact non-volatile memory device

Single-wire bus communication protocol

Method for writing an electrically erasable and programmable non volatile memory and corresponding integrated circuit

Method for writing an electrically erasable and programmable non volatile memory and corresponding integrated circuit

Apparatus for inter-integrated circuit (I2C) clock transmission channel wherein each filtering modules cooperates with the resistive circuit

Electrostatic discharge protection device

EEPROM memory device and corresponding method

Method for addressing a non-volatile memory on I2C bus and corresponding memory device

Non-volatile memory with restricted dimensions

Method for writing in an EEPROM memory and corresponding device

Semiconductor structure and memory device including the structure

Stucture for protecting an integrated circuit against electrostatic discharges

System and method for adjusting EEPROM write cycle duration according to supply voltage variation

Method for writing in an EEPROM memory and corresponding memory

Method for writing into and reading a multi-levels EEPROM and corresponding memory device

SGS THOMSON MICROELECTRONICS

High voltage generator

Method for the testing of integrated circuit chips and corresponding integrated circuit device

Method and apparatus for the protection of non-volatile memory zones

Resistance reference circuit

Method for the anticipated reading of serial access memory, and memory pertaining thereto

Dynamic redundancy circuit for memory in integrated circuit form

Device for the protection of an integrated circuit against electrostatic discharges

Relaxation oscillator using integrated RTC structure

TAILLIET FRANÇOIS

Identification, by a master circuit, of two slave circuits connected to a same bus

Resolving address conflicts for master-slave communications over a single-wire bus between a master circuit and at least two slave circuits

Transmission over an 12C bus

Conversion of a single-wire bus communication protocol

Dual-function integrated circuit

Structure of protection of an integrated circuit against electrostatic discharges

STMICROELECTRONICS ROUSSET

Method for writing in an EEPROM memory and corresponding device

Integrated structure comprising neighboring transistors

Reconfigurable sense amplifier for a memory device

Method and system for managing a writing cycle of a data in a EEPROM memory cell

BAS GILLES

Single wire bus communication protocol