Inventor

CHOI HUN-DAE

KR28 patents

⚠️ This page may combine multiple inventors who share the name “CHOI HUN-DAE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHOI HUN-DAE

SAMSUNG ELECTRONICS CO LTD

Semiconductor memory device and memory system

Output buffer circuit and memory device including the same

Divided clock generation device and divided clock generation method

Delay locked loop to cancel offset and memory device including the same

Delay locked loop to cancel offset and memory device including the same

ZQ calibration method of memory device with shared ZQ pin and memory device performing the ZQ calibration method

Semiconductor memory device for calibrating a termination resistance and a method of calibrating the termination resistance thereof

Calibration circuit including common node shared by pull-up calibration path and pull-down calibration path, and semiconductor memory device including the same

Memory device, memory system including the same, and slew rate calibration method thereof

Memory device having command window generator

Reference voltage training device and method thereof

Memory module including on-die termination circuit and control method thereof

Memory device and method of operating the same for latency control

Delay-locked loop circuit and semiconductor memory device including the same

Delay-locked loop circuit, semiconductor memory device, and methods of operating delay-locked loop circuit

Memory controller for detecting read latency, memory system and test system having the same

Clock correction circuit and memory system comprising the clock correction circuit

Semiconductor memory device and operating method of semiconductor memory device to reduce duty errors

Memory device including common mode extractor

Delay locked loop including replica fine delay circuit and memory device including the same

Semiconductor memory device and memory system having the same

Semiconductor memory device and operating method of semiconductor memory device

Memory device including a delay locked loop and operating method of the memory device

Delay-locked loop circuit and semiconductor memory device including the same

Electronic circuits for outputting post emphasis signals

Semiconductor device and semiconductor system

CHOI HUN-DAE

Semiconductor memory device and system conducting parity check and operating method of semiconductor memory device

JANG YOUNG-CHAN

Transceiver for controlling swing width of output voltage