P

Inventor

BOUTON GUILHEM

FR21 patents
⚠️ This page may combine multiple inventors who share the name “BOUTON GUILHEM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ST MICROELECTRONICS ROUSSET

16 patents
US9269771B2Feb 23, 2016

Integrated circuit comprising components, for example NMOS transistors, having active regions with relaxed compressive stresses

ST MICROELECTRONICS ROUSSET8 citations84
US9263518B2Feb 16, 2016

Component, for example NMOS transistor, with active region with relaxed compression stresses, and fabrication method

ST MICROELECTRONICS ROUSSET7 citations84
US11244893B2Feb 8, 2022

Low-dispersion component in an electronic chip

ST MICROELECTRONICS ROUSSET2 citations72
US10043741B2Aug 7, 2018

Low-dispersion component in an electronic chip

ST MICROELECTRONICS ROUSSET2 citations72
US12087683B2Sep 10, 2024

Low-dispersion component in an electronic chip

ST MICROELECTRONICS ROUSSET0 citations62
US10714583B2Jul 14, 2020

MOS transistor with reduced hump effect

ST MICROELECTRONICS ROUSSET1 citations62
US10861802B2Dec 8, 2020

Method for forming at least one electrical discontinuity in an integrated circuit, and corresponding integrated circuit

ST MICROELECTRONICS ROUSSET0 citations52
US10770547B2Sep 8, 2020

Integrated circuit comprising components, for example NMOS transistors, having active regions with relaxed compressive stresses

ST MICROELECTRONICS ROUSSET0 citations52
US10490632B2Nov 26, 2019

Integrated circuit comprising components, for example NMOS transistors, having active regions with relaxed compressive stresses

ST MICROELECTRONICS ROUSSET0 citations52
US10211291B2Feb 19, 2019

Integrated circuit comprising components, for example NMOS transistors, having active regions with relaxed compressive stresses

ST MICROELECTRONICS ROUSSET0 citations52
US10177101B2Jan 8, 2019

Method for forming at least one electrical discontinuity in an integrated circuit, and corresponding integrated circuit

ST MICROELECTRONICS ROUSSET0 citations52
US10049991B2Aug 14, 2018

Method for forming at least one electrical discontinuity in an interconnection part of an integrated circuit, and corresponding integrated circuit

ST MICROELECTRONICS ROUSSET0 citations52
US9899476B2Feb 20, 2018

Integrated circuit comprising components, for example NMOS transistors, having active regions with relaxed compressive stresses

ST MICROELECTRONICS ROUSSET0 citations52
US10418322B2Sep 17, 2019

Method for making a photolithography mask intended for the formation of contacts, mask and integrated circuit corresponding thereto

ST MICROELECTRONICS ROUSSET0 citations43
US10115666B2Oct 30, 2018

Method for making a photolithography mask intended for the formation of contacts, mask and integrated circuit corresponding thereto

ST MICROELECTRONICS ROUSSET0 citations43
US10049982B2Aug 14, 2018

Method for forming at least one electrical discontinuity in an interconnection part of an integrated circuit without addition of additional material, and corresponding integrated circuit

ST MICROELECTRONICS ROUSSET0 citations41

STMICROELECTRONICS ROUSSET

2 patents

BOUTON GUILHEM

2 patents

ST MICROELECTRONICS SA

1 patent