Inventor
YANG YUNG-HSUAN
US7 patents
Patents
7 patentsUS11329154B2May 10, 2022
Semiconductor device including a superlattice and an asymmetric channel and related methods
ATOMERA INC14 citations93
US11094818B2Aug 17, 2021
Method for making a semiconductor device including a superlattice and an asymmetric channel and related methods
ATOMERA INC18 citations93
US11075078B1Jul 27, 2021
Method for making a semiconductor device including a superlattice within a recessed etch
ATOMERA INC21 citations93
US11869968B2Jan 9, 2024
Semiconductor device including a superlattice and an asymmetric channel and related methods
ATOMERA INC8 citations85
US11569368B2Jan 31, 2023
Method for making semiconductor device including a superlattice and providing reduced gate leakage
ATOMERA INC8 citations85
US11469302B2Oct 11, 2022
Semiconductor device including a superlattice and providing reduced gate leakage
ATOMERA INC10 citations85
US12199180B2Jan 14, 2025
Semiconductor device including a superlattice and an asymmetric channel and related methods
ATOMERA INC0 citations62