Inventor
YANG HSIEN-PAO
US4 patents
Patents
4 patentsUS10541018B2Jan 21, 2020
DDR memory bus with a reduced data strobe signal preamble timespan
INTEL CORP2 citations70
US11074959B2Jul 27, 2021
DDR memory bus with a reduced data strobe signal preamble timespan
INTEL CORP0 citations60
US10923164B2Feb 16, 2021
Dual power I/O transmitter
INTEL CORP0 citations56
US10672438B2Jun 2, 2020
Dynamic reconfigurable dual power I/O receiver
INTEL CORP1 citations55