Inventor
NISHIMOTO SHOZO
JP7 patents
Patents
7 patentsUS5017514AMay 21, 1991
Method of manufacturing a semiconductor device using a main vernier pattern formed at a right angle to a subsidiary vernier pattern
NEC CORP109 citations94
US5457334AOct 10, 1995
Semiconductor memory device
NEC CORP41 citations91
US5289036AFeb 22, 1994
Resin sealed semiconductor integrated circuit
NEC CORP50 citations91
US4969022ANov 6, 1990
Dynamic random access memory device having a plurality of improved one-transistor type memory cells
NEC CORP50 citations91
US5506173AApr 9, 1996
Process of fabricating a dielectric film for a semiconductor device
NEC CORP8 citations72
US4780751AOct 25, 1988
Semiconductor integrated circuit device
NEC CORP17 citations72
US5641609AJun 24, 1997
Method for manufacturing pattern layer having different minimum feature sizes
NEC CORP4 citations61