Inventor
KUSLAK JOHN S
US15 patents
Patents
15 patentsUS6654875B1Nov 25, 2003
Dual microcode RAM address mode instruction execution using operation code RAM storing control words with alternate address indicator
UNISYS CORP43 citations92
US5867699AFeb 2, 1999
Instruction flow control for an instruction processor
UNISYS CORP30 citations92
US7673190B1Mar 2, 2010
System and method for detecting and recovering from errors in an instruction stream of an electronic data processing system
UNISYS CORP21 citations91
US6167479ADec 26, 2000
System and method for testing interrupt processing logic within an instruction processor
UNISYS CORP65 citations91
US5905881AMay 18, 1999
Delayed state writes for an instruction processor
UNISYS CORP41 citations90
US5675768AOct 7, 1997
Store software instrumentation package instruction
UNISYS CORP28 citations90
US5577259ANov 19, 1996
Instruction processor control system using separate hardware and microcode control signals to control the pipelined execution of multiple classes of machine instructions
UNISYS CORP30 citations89
US7058793B1Jun 6, 2006
Pipeline controller for providing independent execution between the preliminary and advanced stages of a synchronous pipeline
UNISYS CORP11 citations83
US7093190B1Aug 15, 2006
System and method for handling parity errors in a data processing system
UNISYS CORP12 citations78
US6108761AAug 22, 2000
Method of and apparatus for saving time performing certain transfer instructions
UNISYS CORP10 citations73
US5761740AJun 2, 1998
Method of and apparatus for rapidly loading addressing registers
UNISYS CORP11 citations73
US5724533AMar 3, 1998
High performance instruction data path
UNISYS CORP7 citations73
US6839833B1Jan 4, 2005
Pipeline depth controller for an instruction processor
UNISYS CORP11 citations71
US5434986AJul 18, 1995
Interdependency control of pipelined instruction processor using comparing result of two index registers of skip instruction and next sequential instruction
UNISYS CORP19 citations67
US7389407B1Jun 17, 2008
Central control system and method for using state information to model inflight pipelined instructions
UNISYS CORP5 citations61