Inventor
Lin Wen Zhang
TW12 patents
⚠️ This page may combine multiple inventors who share the name “Lin Wen Zhang”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG CO LTD
6 patentsUS11646079B2May 9, 2023
Memory cell including programmable resistors with transistor components
TAIWAN SEMICONDUCTOR MFG CO LTD4 citations73
US12051466B2Jul 30, 2024
Memory cell including programmable resistors with transistor components
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations71
US12424279B2Sep 23, 2025
Memory cell including programmable resistors with transistor components
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US12426517B2Sep 23, 2025
Resistive memory device with protrusion covered with resistance changing element and method for manufacturing the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations59
US12041860B2Jul 16, 2024
Resistive memory device and method for manufacturing with protrusion of electrode
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations59
US11943936B2Mar 26, 2024
Semiconductor device and method of manufacturing the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations49
HON HAI PREC IND CO LTD
3 patentsUS9431734B2Aug 30, 2016
Receptacle connector connected to a printed circuit board
HON HAI PREC IND CO LTD22 citations92
US9112299B2Aug 18, 2015
Waterproof electrical connector and method for making the same
HON HAI PREC IND CO LTD18 citations82
US9397449B2Jul 19, 2016
Receptacle connector flexibly connected to a mother board
HON HAI PREC IND CO LTD1 citations51
UNIV NAT TSING HUA
3 patentsUS10770142B2Sep 8, 2020
Memory device
UNIV NAT TSING HUA0 citations48
US10607698B2Mar 31, 2020
Control circuit configured to terminate a set operation and a reset operation of a resistive memory cell of memory array based on the voltage variation on the data line of the resistive memory cell
UNIV NAT TSING HUA0 citations48
US10204681B2Feb 12, 2019
Control circuit configured to terminate a set operation and a reset operation of a resistive memory cell of memory array based on the voltage variation on the data line of the resistive memory cell
UNIV NAT TSING HUA0 citations48