Inventor

LEE BYEONG CHAN

US68 patents

⚠️ This page may combine multiple inventors who share the name “LEE BYEONG CHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE BYEONG CHAN

SAMSUNG ELECTRONICS CO LTD

Methods for fabricating fin field effect transistors using a protective layer to reduce etching damage

Multi-structured Si-fin

Method and device for forming an STI type isolation in a semiconductor device

Semiconductor device having a stress film on a side surface of a fin

Methods of forming semiconductor devices having buried oxide patterns

Methods of fabricating fin field effect transistors

Methods of fabricating fin field effect transistors having capping insulation layers

Semiconductor device having silicon-germanium source/drain regions with varying germanium concentrations

Multi-structured Si-fin and method of manufacture

Fin-field effect transistors (Fin-FETs) having protection layers

Methods of fabricating Fin-field effect transistors (Fin-FETs) having protection layers

Integrated circuit field effect transistors including channel-containing fin having regions of high and low doping concentrations

Methods of forming integrated circuits with thermal oxide layers on side walls of gate electrodes wherein the source and drain are higher than the gate electrode

Method and device for forming an STI type isolation in a semiconductor device

Fin field effect transistors with low resistance contact structures

Semiconductor device with adjacent source/drain regions connected by a semiconductor bridge, and method for fabricating the same

Methods of fabricating MOS transistors having recesses with elevated source/drain regions

Semiconductor memory devices having vertical channel transistors and related methods

MOS transistors having recesses with elevated source/drain regions

Fin field effect transistors having capping insulation layers

Methods for fabricating integrated circuit field effect transistors including channel-containing fin having regions of high and low doping concentrations

Fin field effect transistors including epitaxial fins

Finfets having first and second gates of different resistivities

Methods of forming semiconductor devices including fin structures and related devices

Methods of forming double gate electrodes using tunnel and trench

Semiconductor device having contact pads and method for manufacturing the same

Semiconductor devices having bridge layer and methods of manufacturing the same

Semiconductor devices having composite spacers containing different dielectric materials

Method for fabricating semiconductor device

Method and device for forming an STI type isolation in a semiconductor device

Semiconductor device having silicon-germanium source/drain regions with varying germanium concentrations

Semiconductor devices having multiple gate structures and methods of manufacturing such devices

Semiconductor devices including a finFET

Semiconductor devices

Apparatus and method for controlling air conditioner in air conditioning system

Methods for fabricating DRAM semiconductor devices including silicon epitaxial and metal silicide layers

Semiconductor devices having gate structures and contact pads that are lower than the gate structures

Heterogeneous group IV semiconductor substrates, integrated circuits formed on such substrates, and related methods

Integrated circuit devices having buried insulation layers and methods of forming the same

Metal oxide semiconductor transistors having a drain punch through blocking region and methods for fabricating metal oxide semiconductor transistors having a drain punch through blocking region

KIM SEOK-HOON

FinFET with a single contact to multiple fins bridged together to form a source/drain region of the transistor

Semiconductor devices having source/drain regions with strain-inducing layers and methods of manufacturing such semiconductor devices

Semiconductor devices having bridge layer and methods of manufacturing the same

SON YONG-HOON

Methods of fabricating MOS transistors having recesses with elevated source/drain regions

LEE SEUNG-HUN

Methods of manufacturing semiconductor devices

PARK HEUNG-KYU

Non-volatile memory devices having resistance changeable elements and related systems and methods

YOO JEONG-HO

Semiconductor device and method for fabricating the same

KIM JIN BUM

Semiconductor devices

KIM YOON HAE

Semiconductor devices having multiple gate structures and methods of manufacturing such devices

APPLIED MATERIALS INC

Gate all around I/O engineering