Inventor · disambiguated record
Philip Manela
Also filed as: MANELA PHILIP · MANELA PHILIP R
12 granted patents·314 citations·filing 1989–2014
92Inventor score
Top patents by PatentIndex Score
12 records- 0195US7647467B1Tuning DRAM I/O parameters on the flyNVIDIA CORP·Filed 2006·Granted Jan 12, 2010·76 cites·16 claims
- 0286US7305598B1Test clock generation for higher-speed testing of a semiconductor deviceSANGHANI AMIT·Filed 2005·Granted Dec 4, 2007·16 cites·22 claims
- 0384US5072364AMethod and apparatus for recovering from an incorrect branch prediction in a processor that executes a family of instructions in parallelTANDEM COMPUTERS INC·Filed 1989·Granted Dec 10, 1991·88 cites·6 claims
- 0480US9026714B2Memory expansion using rank aggregationPETERSON JAY EVAN SCOTT·Filed 2010·Granted May 5, 2015·9 cites·18 claims
- 0580US8407394B2System and methods for memory expansionMAZZOLA MARIO·Filed 2008·Granted Mar 26, 2013·11 cites·26 claims
- 0675US8825965B2System and methods for memory expansionMAZZOLA MARIO·Filed 2008·Granted Sep 2, 2014·7 cites·24 claims
- 0773US5717695AOutput pin for selectively outputting one of a plurality of signals internal to a semiconductor chip according to a programmable register for diagnosticsSILICON GRAPHICS INC·Filed 1995·Granted Feb 10, 1998·38 cites·21 claims
- 0872US5075844APaired instruction processor precise exception handling mechanismTANDEM COMPUTERS INC·Filed 1989·Granted Dec 24, 1991·47 cites·8 claims
- 0971US9405698B2System and methods for memory expansionCISCO TECH INC·Filed 2014·Granted Aug 2, 2016·2 cites·20 claims
- 1063US7015740B1Self-adjusting programmable on-chip clock alignerCISCO TECH IND·Filed 2002·Granted Mar 21, 2006·13 cites·42 claims
- 1130US6009506AComputer architecture capable of concurrent issuance and execution of general purpose multiple instructionsTANDEM COMPUTERS INC·Filed 1998·Granted Dec 28, 1999·1 cites·1 claims
- 1229US6035262AReal time observation serial scan test architectureTANDEM COMPUTERS INC·Filed 1994·Granted Mar 7, 2000·6 cites·4 claims
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