Inventor

YAMAZAKI HIDEHISA

JP3 patents

Patents

3 patents

US5973395AOct 26, 1999

IC package having a single wiring sheet with a lead pattern disposed thereon

YAMAICHI ELECTRONICS CO LTD83 citations94

US6243946B1Jun 12, 2001

Method of forming an interlayer connection structure

YAMAICHI ELECTRONICS CO LTD42 citations91

US5950306ASep 14, 1999

Circuit board

YAMAICHI ELECTRONICS CO LTD53 citations91