Inventor · disambiguated record
Dmitry M. Maslennikov
Also filed as: MASLENNIKOV DMITRY · MASLENNIKOV DMITRY M
12 granted patents·5 pending applications·170 citations·filing 1998–2023
88Inventor score
Technology areasG06F
Files withINTEL CORP8ELBRUS INTERNAT LTD2ON FULL DISPLAY LLC2PERFECTQUOTE INC2ASTIGEYEVICH YEVGENIY M1
Top patents by PatentIndex Score
17 records- 0187US10311079B1Database interface systemON FULL DISPLAY LLC·Filed 2018·Granted Jun 4, 2019·7 cites·4 claims
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- 0381US6301706B1Compiler method and apparatus for elimination of redundant speculative computations from innermost loopsELBRUS INTERNAT LTD·Filed 1998·Granted Oct 9, 2001·98 cites·6 claims
- 0472US11042563B1Database interface systemON FULL DISPLAY LLC·Filed 2019·Granted Jun 22, 2021·1 cites·14 claims
- 0571US12271394B1Database interface systemPERFECTQUOTE INC·Filed 2023·Granted Apr 8, 2025·0 cites·21 claims
- 0665US6412105B1Computer method and apparatus for compilation of multi-way decisionsELBRUS INTERNAT LTD·Filed 1998·Granted Jun 25, 2002·60 cites·12 claims
- 0754US9086873B2Methods and apparatus to compile instructions for a vector of instruction pointers processor architectureASTIGEYEVICH YEVGENIY M·Filed 2013·Granted Jul 21, 2015·2 cites·16 claims
- 0846US10235171B2Method and apparatus to efficiently handle allocation of memory ordering buffers in a multi-strand out-of-order loop processorINTEL CORP·Filed 2016·Granted Mar 19, 2019·0 cites·20 claims
- 0945US2016055004A1Method and apparatus for non-speculative fetch and execution of control-dependent blocksGROCHOWSKI EDWARD T·Filed 2014·Application pending·0 cites
- 1044US10241801B2Method and apparatus to create register windows for parallel iterations to achieve high performance in HW-SW codesigned loop acceleratorINTEL CORP·Filed 2016·Granted Mar 26, 2019·0 cites·22 claims
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- 1243US10241789B2Method to do control speculation on loads in a high performance strand-based loop acceleratorINTEL CORP·Filed 2016·Granted Mar 26, 2019·0 cites·20 claims
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- 1532US2017161075A1Increasing processor instruction window via seperating instructions according to criticalityINTEL CORP·Filed 2015·Application pending·0 cites
- 1631US2016378480A1Systems, Methods, and Apparatuses for Improving Performance of Status Dependent ComputationsMATVEYEV PAVEL G·Filed 2015·Application pending·0 cites
- 1730US2018285119A1Apparatus and method for inter-strand communicationINTEL CORP·Filed 2015·Application pending·0 cites
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