Inventor

OHBAYASHI SHIGEKI

JP66 patents

⚠️ This page may combine multiple inventors who share the name “OHBAYASHI SHIGEKI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

OHBAYASHI SHIGEKI

MITSUBISHI ELECTRIC CORP

Semiconductor integrated circuit capable of synchronous and asynchronous operations and operating method therefor

Synchronous semiconductor memory device operable in a burst mode

Clock synchronous semiconductor memory device having current consumption reduced

Static semiconductor memory device having improved characteristics

Static semiconductor memory device having circuitry for lowering potential of bit lines at commencement of data writing

Semiconductor memory device having non-selecting level generation circuitry for providing a low potential during reading mode and high level potential during another operation mode

Semiconductor circuit device with improved surge resistance

Static type semiconductor memory device adopting a redundancy system

Synchronous semiconductor memory device operable in a snooze mode

Semiconductor memory having redundant cells

ECL input buffer for BiCMOS

Semiconductor memory device and testing method therefor

Power on reset circuit

Power on reset circuit

Semiconductor integrated circuit device operating stably at a plurality of power supply voltage levels

Semiconductor integrated circuit device using BiCMOS technology

Power on reset circuit for generating reset signal at power on

Semiconductor memory device comprising two kinds of memory cells operating in different access speeds and methods of operating and manufacturing the same

Semiconductor memory device operable to write data accurately at high speed

Static semiconductor memory device having circuitry for enlarging write recovery margin

Semiconductor memory device capable of driving divided word lines at high speed

Semiconductor memory device with a sense amplifier including two types of amplifiers

Semiconductor memory device

Program circuit suppressing stand-by current and permitting highly reliable operation, and semiconductor memory device using the program circuit

Static semiconductor memory device having circuitry for lowering potential of bit lines at commencement of data writing

Semiconductor circuit device with improved surge resistance

Semiconductor static random access memory device

Semiconductor integrated circuit device using BiCMOS technology

Test circuit for reducing test time in semiconductor memory device having multiple data input/output terminals

Semiconductor memory device comprising two kinds of memory cells operating in different access speeds and methods of operating and manufacturing the same

Semiconductor integrated circuit for outputting an intermediate potential

Sense amplifier operable under variable power supply voltage

Bi-CMOS logic circuit

Static semiconductor memory device having test mode

RENESAS TECH CORP

Semiconductor storage device and method of fabricating the same

Semiconductor memory device with adjustable selected work line potential under low voltage condition

Semiconductor integrated circuit having bonding optional function

Semiconductor memory device capable of performing burn-in test at high speed

Semiconductor memory device including data bus pairs respectively dedicated to data writing and data reading

Semiconductor integrated circuit having bonding optional function

Static semiconductor memory device having T-type bit line structure

Semiconductor memory

Power on reset circuit

Semiconductor memory device having divided word line structure

NII KOJI

Semiconductor memory device for stably reading and writing data

Semiconductor memory device with adjustable selected word line potential under low voltage condition

RENESAS ELECTRONICS CORP

Semiconductor memory device for stably reading and writing data

Semiconductor memory device for stably reading and writing data

TOMITA HIDEMOTO

Semiconductor storage device and method of fabricating the same

MITSUBISHI KABUSHIKI KAISHA

Semiconductor memory device with two layers of bit lines