Inventor

SUBRAMANIAN CHITRA K

US42 patents

⚠️ This page may combine multiple inventors who share the name “SUBRAMANIAN CHITRA K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SUBRAMANIAN CHITRA K

MOTOROLA INC

Memory device that includes passivated nanoclusters and method for manufacture

Sense amplifier for a memory having at least two distinct resistance states

Memory device and method for using prefabricated isolated storage elements

Multi-step planarization process using polishing at two different pad pressures

Method of forming shared contact structure

Process for fabricating a semiconductor device having a segmented channel region

Memory having a precharge circuit and method therefor

Balanced load memory and method of operation

Circuit and method of writing a toggle memory

Magnetic memory and method of bi-directional write current programming

Memory having write current ramp rate control

Sense amplifier incorporating a symmetric midpoint reference

Process for forming a semiconductor device

Memory architecture with write circuitry and method therefor

Circuit and method for reading a toggle memory cell

Technique for sensing the state of a magneto-resistive random access memory

Three input sense amplifier and method of operation

EVERSPIN TECHNOLOGIES INC

Memory device with shared read/write circuitry

Memory device with shared read/write circuitry

Memory device with shared read/write circuitry

Memory device with differential bit cells

Toggle memory burst

Antifuse circuit and method for selectively programming thereof

Self-referenced sense amplifier with precharge

Tamper detection and response in a memory device

Tamper detection and response in a memory device

Self referencing sense amplifier for spin torque MRAM

Memory device with sampled resistance controlled write voltages

Delayed write-back in memory

FREESCALE SEMICONDUCTOR INC

Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics

Antifuse circuit

MRAM architecture with electrically isolated read and write circuitry

Sense amplifier and method for performing a read operation in a MRAM

MRAM memory with residual write field reset

Circuit for write field disturbance cancellation in an MRAM and method of operation

Write driver for a magnetoresistive memory

MRAM architecture with electrically isolated read and write circuitry

PURDUE RESEARCH FOUNDATION

Method of forming semiconductor-on-insulator electronic devices by growing monocrystalline semiconducting regions from trench sidewalls

Semiconductor-on-insulator electronic devices having trench isolated monocrystalline active regions

IBM

True random number generator

Photovoltaic cell form ultra-small IOT device with multi-level voltage output

NAHAS JOSEPH J

Random access memory architecture including midpoint reference