Inventor

ROSTOKER MICHAEL D

US202 patents

⚠️ This page may combine multiple inventors who share the name “ROSTOKER MICHAEL D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ROSTOKER MICHAEL D

LSI LOGIC CORP

Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation

Hexagonal architecture

Cell placement representation and transposition for integrated circuit physical design automation system

Single chip systems using general purpose processors

Light sensing device having an array of photosensitive elements coincident with an array of lens formed on an optically transmissive material

Architecture having diamond shaped or parallelogram shaped cells

Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models

Technique for mounting a semiconductor die

System and method for creating and validating structural description of electronic system from higher-level and behavior-oriented description

CAD for hexagonal architecture

Hexagonal field programmable gate array architecture

Single chip multiprocessor architecture with internal task switching synchronization bus

Hexagonal DRAM array

Printable superconductive leadframes for semiconductor device assembly

Microelectronic integrated circuit including triangular CMOS &#34;nand&#34; gate device

Single chip network router

Computer implemented method for producing optimized cell placement for integrated circiut chip

System and method for creating and validating structural description of electronic system

Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models

Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation

Semiconductor packages for high I/O semiconductor dies

Process for solder ball interconnecting a semiconductor device to a substrate using a noble metal foil embedded interposer substrate

Integrated circuit physical design automation system utilizing optimization process decomposition and parallel processing

Shaped, self-aligning micro-bump structures

Error detection and correction apparatus for an asynchronous transfer mode (ATM) network device

Multi-chip semiconductor arrangements using flip chip dies

Methods of cleaning semiconductor substrates after polishing

Image-sensing display panels with LCD display panel and photosensitive element array

Techniques for providing high I/O count connections to semiconductor dies

Detecting the endpoint of chem-mech polishing, and resulting semiconductor device

Optimization processing for integrated circuit physical design automation system using optimally switched fitness improvement algorithms

Method and apparatus for the dynamic allocation of signal bandwidth between audio, video and data signals

Multi-frequency wireless communication device

Multi-frequency multi-protocol wireless communication device

Tri-directional interconnect architecture for SRAM

Single chip network adapter apparatus

Simultaneous placement and routing (SPAR) method for integrated circuit physical design automation system

High speed single chip digital video network apparatus

Testing and exercising individual, unsingulated dies on a wafer

Transistors having dynamically adjustable characteristics

Wireless system for the communication of audio, video and data signals over a narrow bandwidth

Electronic system having fluid-filled and gas-filled thermal cooling of its semiconductor devices

Systems having shaped, self-aligning micro-bump structures

Process for forming metal interconnect structures for use with integrated circuit devices to form integrated circuit structures

Traffic control system utilizing cellular telephone system

Process for forming low dielectric constant layers using fullerenes

Method of assembling ball bump grid array semiconductor packages

Automating photolithography in the fabrication of integrated circuits

Metal interconnect structures for use with integrated circuit devices to form integrated circuit structures

KAWASAKI MICROELECTRONICS INC

Configurable universal serial bus (USB) controller implemented on a single integrated circuit (IC) chip with media access control (MAC)

Microelectronic integrated circuit including triangular CMOS "nand" gate device