Inventor

DEBOER SCOTT J

US64 patents

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DEBOER SCOTT J

MICRON TECHNOLOGY INC

Method and structure for reducing contact aspect ratios

Apparatus for forming a high dielectric film

Batch processing for semiconductor wafers to form aluminum nitride and titanium aluminum nitride

Fabrication of semiconductor devices with transition metal boride films as diffusion barriers

Structure for reducing contact aspect ratios

Batch processing for semiconductor wafers to form aluminum nitride and titanium aluminum nitride

Methods for forming a dielectric film

Batch processing for semiconductor wafers to form aluminum nitride and titanium aluminum nitride

Barrier layer fabrication methods

Conditioning of dielectric materials

Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers

DRAM capacitors made from silicon-germanium and electrode-limited conduction dielectric films

DRAM capacitor formulation using a double-sided electrode

Method and structure for reducing contact aspect ratios

Capacitors, methods of forming capacitors, and methods of forming capacitor dielectric layers

Double sided container process used during the manufacture of a semiconductor device

Capacitors

Methods of forming capacitors

Method of forming a capacitor dielectric layer

Double sided container process used during the manufacture of a semiconductor device

Method and structure for reducing contact aspect ratios

Capacitor structures with recessed hemispherical grain silicon

Methods of forming recessed hemispherical grain silicon capacitor structures

Boride electrodes and barriers for cell dielectrics

Semiconductor processing methods of forming photoresist over silicon nitride materials, and semiconductor wafer assemblies comprising photoresist over silicon nitride materials

Oxide etching method and structures resulting from same

Methods of forming capacitors and related integrated circuitry

DRAM capacitors made from silicon-germanium and electrode-limited conduction dielectric films

Boride electrodes and barriers for cell dielectrics

Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers

Method for depositing cell nitride with improved step coverage using MOCVD in a wafer deposition system

Method of fabricating a semiconductor device utilizing polysilicon grains

DRAM capacitor formulation using a double-sided electrode

DRAM capacitor formulation using a double-sided electrode

Oxide etching method and structures resulting from same

Raised-lines overlay semiconductor targets and method of making the same

Method and structure for reducing contact aspect ratios

Capacitor structures with recessed hemispherical grain silicon

Structure for reducing contact aspect ratios

Fabrication of semiconductor devices with transition metal boride films as diffusion barriers

Fabrication of semiconductor devices with transition metal boride films as diffusion barriers

Methods of forming recessed hemispherical grain silicon capacitor structures

Boride electrodes and barriers for cell dielectrics

Structure for reducing contact aspect ratios

Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers

Methods of forming capacitors and related integrated circuitry

Structural integrity enhancement of dielectric films

Residue free overlay target

Double sided container process used during the manufacture of a semiconductor device

MICRON TECHNOLOLGY INC

Method of forming capacitors and related integrated circuitry