Inventor
SRINIVASAN ADI
US26 patents
⚠️ This page may combine multiple inventors who share the name “SRINIVASAN ADI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
APTIX CORP
9 patentsUS5301147AApr 5, 1994
Static random access memory cell with single logic-high voltage level bit-line and address-line drivers
APTIX CORP39 citations93
US5406138AApr 11, 1995
Programmable interconnect architecture using fewer storage cells than switches
APTIX CORP15 citations74
US5400294AMar 21, 1995
Memory cell with user-selectable logic state on power-up
APTIX CORP12 citations74
US5319261AJun 7, 1994
Reprogrammable interconnect architecture using fewer storage cells than switches
APTIX CORP8 citations74
US5257239AOct 26, 1993
Memory cell with known state on power-up
APTIX CORP17 citations74
US5239503AAug 24, 1993
High voltage random-access memory cell incorporating level shifter
APTIX CORP7 citations74
US5315545AMay 24, 1994
High-voltage five-transistor static random access memory cell
APTIX CORP13 citations66
US5367482ANov 22, 1994
High voltage random-access memory cell incorporation level shifter
APTIX CORP4 citations63
US5264741ANov 23, 1993
Low current, fast, CMOS static pullup circuit for static random-access memories
APTIX CORP2 citations63
SEQUENCE DESIGN INC
7 patentsUS6698006B1Feb 24, 2004
Method for balanced-delay clock tree insertion
SEQUENCE DESIGN INC99 citations98
US6754877B1Jun 22, 2004
Method for optimal driver selection
SEQUENCE DESIGN INC53 citations96
US6701505B1Mar 2, 2004
Circuit optimization for minimum path timing violations
SEQUENCE DESIGN INC54 citations96
US7003741B2Feb 21, 2006
Method for determining load capacitance
SEQUENCE DESIGN INC22 citations92
US6701507B1Mar 2, 2004
Method for determining a zero-skew buffer insertion point
SEQUENCE DESIGN INC44 citations92
US6701506B1Mar 2, 2004
Method for match delay buffer insertion
SEQUENCE DESIGN INC32 citations92
US7222318B2May 22, 2007
Circuit optimization for minimum path timing violations
SEQUENCE DESIGN INC13 citations84
LIGHTSPEED SEMICONDUCTOR CORP
6 patentsUS6242767B1Jun 5, 2001
Asic routing architecture
LIGHTSPEED SEMICONDUCTOR CORP172 citations99
US6014038AJan 11, 2000
Function block architecture for gate array
LIGHTSPEED SEMICONDUCTOR CORP57 citations96
US6954917B2Oct 11, 2005
Function block architecture for gate array and method for forming an asic
LIGHTSPEED SEMICONDUCTOR CORP15 citations92
US6611932B2Aug 26, 2003
Method and apparatus for controlling and observing data in a logic block-based ASIC
LIGHTSPEED SEMICONDUCTOR CORP22 citations92
US6223313B1Apr 24, 2001
Method and apparatus for controlling and observing data in a logic block-based asic
LIGHTSPEED SEMICONDUCTOR CORP38 citations90
US6690194B1Feb 10, 2004
Function block architecture for gate array
LIGHTSPEED SEMICONDUCTOR CORP10 citations74
GRADIENT DESIGN AUTOMATION INC
3 patentsUS7823102B2Oct 26, 2010
Thermally aware design modification
GRADIENT DESIGN AUTOMATION INC51 citations93
US8019580B1Sep 13, 2011
Transient thermal analysis
GRADIENT DESIGN AUTOMATION INC35 citations90
US7353471B1Apr 1, 2008
Method and apparatus for using full-chip thermal analysis of semiconductor chip designs to compute thermal conductance
GRADIENT DESIGN AUTOMATION INC13 citations84