Inventor
MUTH WILLIAM A
US7 patents
Patents
7 patentsUS5757507AMay 26, 1998
Method of measuring bias and edge overlay error for sub-0.5 micron ground rules
IBM263 citations98
US5712707AJan 27, 1998
Edge overlay measurement target for sub-0.5 micron ground rules
IBM218 citations98
US6638671B2Oct 28, 2003
Combined layer-to-layer and within-layer overlay control system
IBM55 citations92
US7879515B2Feb 1, 2011
Method to control semiconductor device overlay using post etch image metrology
IBM7 citations83
US6975398B2Dec 13, 2005
Method for determining semiconductor overlay on groundrule devices
IBM19 citations83
US7957826B2Jun 7, 2011
Methods for normalizing error in photolithographic processes
IBM9 citations78
US7962302B2Jun 14, 2011
Predicting wafer failure using learned probability
IBM5 citations56