Inventor
YAO TSE-YONG
US14 patents
Patents
14 patentsUS6328871B1Dec 11, 2001
Barrier layer for electroplating processes
APPLIED MATERIALS INC161 citations99
US6217721B1Apr 17, 2001
Filling narrow apertures and forming interconnects with a metal utilizing a crystallographically oriented liner layer
APPLIED MATERIALS INC206 citations99
US5962923AOct 5, 1999
Semiconductor device having a low thermal budget metal filling and planarization of contacts, vias and trenches
APPLIED MATERIALS INC142 citations99
US6051114AApr 18, 2000
Use of pulsed-DC wafer bias for filling vias/trenches with metal in HDP physical vapor deposition
APPLIED MATERIALS INC304 citations97
US6136095AOct 24, 2000
Apparatus for filling apertures in a film layer on a semiconductor substrate
APPLIED MATERIALS INC52 citations96
US6790776B2Sep 14, 2004
Barrier layer for electroplating processes
APPLIED MATERIALS INC34 citations92
US6313027B1Nov 6, 2001
Method for low thermal budget metal filling and planarization of contacts vias and trenches
APPLIED MATERIALS INC33 citations92
US6277198B1Aug 21, 2001
Use of tapered shadow clamp ring to provide improved physical vapor deposition system
APPLIED MATERIALS INC27 citations92
US6140235AOct 31, 2000
High pressure copper fill at low temperature
APPLIED MATERIALS INC29 citations92
US5847461ADec 8, 1998
Integrated circuit structure having contact openings and vias filled by self-extrusion of overlying metal layer
APPLIED MATERIALS INC20 citations91
US5668055ASep 16, 1997
Method of filling of contact openings and vias by self-extrusion of overlying compressively stressed matal layer
APPLIED MATERIALS INC30 citations91
US6436302B1Aug 20, 2002
Post CU CMP polishing for reduced defects
APPLIED MATERIALS INC45 citations90
US6607640B2Aug 19, 2003
Temperature control of a substrate
APPLIED MATERIALS INC13 citations83
US6436832B1Aug 20, 2002
Method to reduce polish initiation time in a polish process
APPLIED MATERIALS INC16 citations81