Inventor

JEON YONG-WEON

KR35 patents

⚠️ This page may combine multiple inventors who share the name “JEON YONG-WEON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JEON YONG-WEON

SAMSUNG ELECTRONICS CO LTD

Level shifter having low peak current

Apparatus for supplying gamma signals

Driving multiple sub-pixels from single gray scale data

Source driving circuit, display device and method of driving a source driver

Digital to analog converter and source driver

Delay locked loop (DLL) using an oscillator and a counter and a clock synchronizing method

Device for adjusting transmission signal level based on channel loading

Bus interface technology

LCD source driving circuit having reduced structure including multiplexing-latch circuits

Latch-based pulse generator

Digital/analog converting driver and method

Pseudo differential current mode receiver

Regulated cascode amplifier with small-sized feed-back amplifier

Receiver and transceiver for multi-level current-mode signaling

Thin film transistor liquid crystal display (TFT-LCD) source driver for implementing a self burn-in test and a method thereof

Digital to analog converter with minimum area and source driver having the same

Flexible control of charge share in display panel

Current-mode semiconductor integrated circuit device operating in voltage mode during test mode

Routing signals to drivers of display device with minimized wiring

Current mode transmitter capable of canceling channel charge error

Current-mode receiving device for display system

Cascode-type current mode comparator and receiver, and semiconductor device having the same

Semiconductor devices for receiving a current mode signal and methods of operating the same

LG SEMICON CO LTD

Clock generator for generating complementary clock signals with minimal time differences

Multi-bit testing circuit for semiconductor memory device

Address transition detection circuit

Clock generator for generating complementary clock signals with minimal time differences

Equalization pulse generating circuit for memory device

NAM JANG JIN

Differential data transferring system and method using three level voltages

Internal clock generating circuit and method for generating internal clock signal with data signal

TLI INC

Source driver for display devices

High voltage stress test circuit

HYUNDAI ELECTRONICS IND

Method for controlling memory cell having long refresh interval

NAM JANG-JIN

Device for adjusting transmission signal level based on channel loading

KIM KYUNG-WOL

Flexible control of charge share in display panel