P
PatentIndex
Search
Landscape
Sign in
Inventor
STEINMETZ PAUL M
US
10 patents
⚠️ This page may combine multiple inventors who share the name “STEINMETZ PAUL M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
BOWERS BENJAMIN J
3 patents
US8122399B2
Feb 21, 2012
Compiler for closed-loop 1×N VLSI design
BOWERS BENJAMIN J
10 citations
82
US8887113B2
Nov 11, 2014
Compiler for closed-loop 1xN VLSI design
BOWERS BENJAMIN J
3 citations
61
US8739086B2
May 27, 2014
Compiler for closed-loop 1×N VLSI design
BOWERS BENJAMIN J
0 citations
50
CORREALE JR ANTHONY
2 patents
US8141016B2
Mar 20, 2012
Integrated design for manufacturing for 1×N VLSI design
CORREALE JR ANTHONY
13 citations
82
US8132134B2
Mar 6, 2012
Closed-loop 1×N VLSI design system
CORREALE JR ANTHONY
1 citations
50
IBM
2 patents
US7966598B2
Jun 21, 2011
Top level hierarchy wiring via 1×N compiler
IBM
9 citations
81
US7319578B2
Jan 15, 2008
Digital power monitor and adaptive self-tuning power management
IBM
2 citations
59
BAKER MATTHEW W
1 patent
US8156458B2
Apr 10, 2012
Uniquification and parent-child constructs for 1xN VLSI design
BAKER MATTHEW W
9 citations
78
STEINMETZ PAUL M
1 patent
US8136062B2
Mar 13, 2012
Hierarchy reassembler for 1×N VLSI design
STEINMETZ PAUL M
7 citations
78
MENTOR GRAPHICS CORP
1 patent
US9558308B2
Jan 31, 2017
Compiler for closed-loop 1×N VLSI design
MENTOR GRAPHICS CORP
3 citations
72