Inventor

MAURELLI ALFONSO

IT29 patents

⚠️ This page may combine multiple inventors who share the name “MAURELLI ALFONSO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MAURELLI ALFONSO

ST MICROELECTRONICS SRL

Process for integrating in a same chip a non-volatile memory and a high-performance logic circuitry

Process for integrating in a same chip a non-volatile memory and a high-performance logic circuitry

Device and method for reading nonvolatile memory cells

Process for obtaining an N-channel single polysilicon level EPROM cell and cell obtained with said process

Electrically erasable and programmable non-volatile memory cell

Method of manufacturing an integrated circuit, for integrating an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chip

Method of manufacturing an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chip

Self-test and correction of loss of charge errors in a flash memory, erasable and programmable by sectors thereof

EEPROM type non-volatile memory cell and corresponding production method

Non-volatile memory cell with a single level of polysilicon, in particular of the flash EEPROM type, and method for manufacturing the same

Single polysilicon level flash EEPROM cell and manufacturing process therefor

N-channel single polysilicon level EPROM cell

Manufacturing process for the integration in a semiconductor chip of an integrated circuit including a high-density integrated circuit components portion and a high-performance logic integrated circuit components portion

Method of manufacturing an integrated semiconductor device having a nonvolatile floating gate memory, and related integrated device

Process for the manufacture of an integrated voltage limiter and stabilizer in flash EEPROM memory devices

Manufacturing method for non-active electrically structures in order to optimize the definition of active electrically structures in an electronic circuit integrated on a semiconductor substrate and corresponding circuit

Method of fabrication of a no-field MOS transistor

Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structure

Analysis of the quality of contacts and vias in multi-metal fabrication processes of semiconductor devices, method and test chip architecture

Method for the integration of resistors and esd self-protected transistors in an integrated device with a memory matrix manufactured by means of a process featuring self-aligned source (sas) formation and junction salicidation

Manufacturing process for making single polysilicon level flash EEPROM cell

Method of forming low-resistivity connections in non-volatile memories

Process for the manufacture of an integrated voltage limiter and stabilizer in flash EEPROM memory devices

Manufacturing method for non-active electrically structures in order to optimize the definition of active electrically structures in an electronic circuit integrated on a semiconductor substrate and corresponding circuit

Process for manufacturing a memory device integrated on a semiconductor substrate and comprising nanocrystal memory cells and CMOS transistors

SGS THOMSON MICROELECTRONICS

High voltage capacitor

Method of manufacturing integrated circuits having electronic components of two different types each having pairs of electrodes obtained from the same polycrystalline silicon layers and separated by different dielectric materials

PIAZZA FAUSTO

Integrating diverse transistors on the same wafer

ST MICROELECTONICS SRL

Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structure