Inventor
SHAHEEN MOHAMAD A
US20 patents
⚠️ This page may combine multiple inventors who share the name “SHAHEEN MOHAMAD A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
16 patentsUS7052978B2May 30, 2006
Arrangements incorporating laser-induced cleaving
INTEL CORP75 citations97
US7042009B2May 9, 2006
High mobility tri-gate devices and methods of fabrication
INTEL CORP80 citations96
US7573059B2Aug 11, 2009
Dislocation-free InSb quantum well structure on Si using novel buffer architecture
INTEL CORP41 citations92
US7494911B2Feb 24, 2009
Buffer layers for device isolation of devices grown on silicon
INTEL CORP19 citations92
US6645831B1Nov 11, 2003
Thermally stable crystalline defect-free germanium bonded to silicon and silicon dioxide
INTEL CORP71 citations92
US6833195B1Dec 21, 2004
Low temperature germanium transfer
INTEL CORP30 citations91
US7851780B2Dec 14, 2010
Semiconductor buffer architecture for III-V devices on silicon substrates
INTEL CORP14 citations83
US7279369B2Oct 9, 2007
Germanium on insulator fabrication via epitaxial germanium bonding
INTEL CORP10 citations82
US7148122B2Dec 12, 2006
Bonding of substrates
INTEL CORP9 citations67
US7355247B2Apr 8, 2008
Silicon on diamond-like carbon devices
INTEL CORP5 citations63
US6911380B2Jun 28, 2005
Method of forming silicon on insulator wafers
INTEL CORP5 citations62
US7723749B2May 25, 2010
Strained semiconductor structures
INTEL CORP1 citations52
US7157379B2Jan 2, 2007
Strained semiconductor structures
INTEL CORP1 citations52
US8034675B2Oct 11, 2011
Semiconductor buffer architecture for III-V devices on silicon substrates
INTEL CORP0 citations51
US7851781B2Dec 14, 2010
Buffer layers for device isolation of devices grown on silicon
INTEL CORP0 citations51
US7670928B2Mar 2, 2010
Ultra-thin oxide bonding for S1 to S1 dual orientation bonding
INTEL CORP1 citations51