Inventor
BRETERNITZ JR MAURICIO
US32 patents
⚠️ This page may combine multiple inventors who share the name “BRETERNITZ JR MAURICIO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
10 patentsUS7451121B2Nov 11, 2008
Genetic algorithm for microcode compression
INTEL CORP19 citations93
US7095342B1Aug 22, 2006
Compressing microcode
INTEL CORP19 citations92
US7757221B2Jul 13, 2010
Apparatus and method for dynamic binary translator to support precise exceptions with minimal optimization constraints
INTEL CORP28 citations91
US7620781B2Nov 17, 2009
Efficient Bloom filter
INTEL CORP23 citations89
US9817644B2Nov 14, 2017
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
INTEL CORP5 citations84
US7725887B2May 25, 2010
Method and system for reducing program code size
INTEL CORP8 citations84
US7428731B2Sep 23, 2008
Continuous trip count profiling for loop optimizations in two-phase dynamic binary translators
INTEL CORP15 citations84
US7694281B2Apr 6, 2010
Two-pass MRET trace selection for dynamic optimization
INTEL CORP10 citations83
US7840953B2Nov 23, 2010
Method and system for reducing program code size
INTEL CORP3 citations63
US7430574B2Sep 30, 2008
Efficient execution and emulation of bit scan operations
INTEL CORP1 citations50
MOTOROLA INC
9 patentsUS6044220AMar 28, 2000
Method and apparatus for operating a data processor to execute software written using a foreign instruction set
MOTOROLA INC127 citations98
US5889999AMar 30, 1999
Method and apparatus for sequencing computer instruction execution in a data processing system
MOTOROLA INC139 citations98
US6381739B1Apr 30, 2002
Method and apparatus for hierarchical restructuring of computer code
MOTOROLA INC139 citations96
US5966143AOct 12, 1999
Data allocation into multiple memories for concurrent access
MOTOROLA INC68 citations96
US5805895ASep 8, 1998
Method and apparatus for code translation optimization
MOTOROLA INC75 citations95
US6216213B1Apr 10, 2001
Method and apparatus for compression, decompression, and execution of program code
MOTOROLA INC36 citations93
US6484228B2Nov 19, 2002
Method and apparatus for data compression and decompression for a data processor system
MOTOROLA INC17 citations84
US6343354B1Jan 29, 2002
Method and apparatus for compression, decompression, and execution of program code
MOTOROLA INC13 citations74
US6523095B1Feb 18, 2003
Method and data processing system for using quick decode instructions
MOTOROLA INC6 citations63
IBM
4 patentsUS5537620AJul 16, 1996
Redundant load elimination on optimizing compilers
IBM66 citations96
US5659699AAug 19, 1997
Method and system for managing cache memory utilizing multiple hash functions
IBM24 citations92
US5634025AMay 27, 1997
Method and system for efficiently fetching variable-width instructions in a data processing system having multiple prefetch units
IBM24 citations92
US5737576AApr 7, 1998
Method and system for efficient instruction execution in a data processing system having multiple prefetch units
IBM6 citations74
ADVANCED MICRO DEVICES INC
3 patentsUS10866768B2Dec 15, 2020
Storage location assignment at a cluster compute server
ADVANCED MICRO DEVICES INC7 citations83
US11880610B2Jan 23, 2024
Storage location assignment at a cluster compute server
ADVANCED MICRO DEVICES INC0 citations62
US10318153B2Jun 11, 2019
Techniques for changing management modes of multilevel memory hierarchy
ADVANCED MICRO DEVICES INC0 citations47
BRETERNITZ JR MAURICIO
2 patentsUS8549504B2Oct 1, 2013
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
BRETERNITZ JR MAURICIO19 citations90
US8929220B2Jan 6, 2015
Processing system using virtual network interface controller addressing as flow control metadata
BRETERNITZ JR MAURICIO2 citations60