Inventor
GUO WEIQING
US20 patents
⚠️ This page may combine multiple inventors who share the name “GUO WEIQING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
BOE TECHNOLOGY GROUP CO LTD
6 patentsUS10545715B2Jan 28, 2020
Splicing-screen display system and splicing display method
BOE TECHNOLOGY GROUP CO LTD2 citations71
US10901427B2Jan 26, 2021
Measurement assembly and positioning system
BOE TECHNOLOGY GROUP CO LTD0 citations52
US10333262B2Jun 25, 2019
Socket
BOE TECHNOLOGY GROUP CO LTD0 citations41
US10644541B2May 5, 2020
Transformer and power supply board
BOE TECHNOLOGY GROUP CO LTD0 citations40
US10015433B2Jul 3, 2018
Sound adjustment system and sound adjustment method
BOE TECHNOLOGY GROUP CO LTD0 citations40
US9693004B2Jun 27, 2017
Signal emitting apparatus, signal receiving apparatus, signal processing method and display system
BOE TECHNOLOGY GROUP CO LTD0 citations40
LITTELFUSE INC
4 patentsUS9831054B2Nov 28, 2017
Insulated thermal cut-off device
LITTELFUSE INC7 citations83
US10424952B2Sep 24, 2019
Bistage temperature device using positive temperature coefficient material
LITTELFUSE INC0 citations51
US10186356B2Jan 22, 2019
Flexible positive temperature coefficient sheet and method for making the same
LITTELFUSE INC0 citations51
US10297373B1May 21, 2019
Jelly roll-type positive temperature coefficient device
LITTELFUSE INC0 citations41
LSI CORP
4 patentsUS7661083B2Feb 9, 2010
Probabilistic noise analysis
LSI CORP1 citations51
US7539960B2May 26, 2009
Reducing a parasitic graph in moment computation algorithms in VLSI systems
LSI CORP0 citations51
US7376918B2May 20, 2008
Probabilistic noise analysis
LSI CORP0 citations51
US7260801B2Aug 21, 2007
Delay computation speed up and incrementality
LSI CORP0 citations40
LSI LOGIC CORP
3 patentsUS6990420B2Jan 24, 2006
Method of estimating a local average crosstalk voltage for a variable voltage output resistance model
LSI LOGIC CORP7 citations68
US7082583B2Jul 25, 2006
Method for reducing a parasitic graph in moment computation in VLSI systems
LSI LOGIC CORP1 citations62
US7334204B2Feb 19, 2008
System for avoiding false path pessimism in estimating net delay for an integrated circuit design
LSI LOGIC CORP0 citations51