Inventor

SMITH LANE A

US101 patents

⚠️ This page may combine multiple inventors who share the name “SMITH LANE A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SMITH LANE A

AGERE SYSTEMS INC

High-speed CML circuit design

Power up reset circuit for line powered circuit

Distribution of current draw in a line powered DAA

Analog amplifier having DC offset cancellation circuit and method of offset cancellation for analog amplifiers

Analog amplifier having DC offset cancellation circuit and method of offset cancellation for analog amplifiers

Dynamically adjustable digital gyrator having extendable feedback for stable DC load line

Compensation techniques for reducing power consumption in digital circuitry

Phase interpolator having a phase jump

Method and apparatus for adjusting receiver gain based on received signal envelope detection

Method and apparatus for generating one or more clock signals for a decision-feedback equalizer using DFE detected data

Method and apparatus for generating one or more clock signals for a decision-feedback equalizer using DFE detected data in the presence of an adverse pattern

Method and apparatus for data rate detection using a data eye monitor

Multilevel amplitude modulated signaling in fibre channel

Methods and apparatus for interfacing a plurality of encoded serial data streams to a serializer/deserializer circuit

Exploitive test pattern apparatus and method

Serializer deserializer (SERDES) testing

Method and apparatus for non-disruptive telecommunication loop condition determination

Digital gyrator

Maintaining an off-hook condition during a call bridge

Startup procedure for international line powered DAA

Placement of a transmit predistortion filter with respect to a data access arrangement

Method and apparatus for regulating a power supply of an integrated circuit

Method and apparatus for detecting and adjusting characteristics of a signal

Method and apparatus for determining a position of an offset latch employed for decision-feedback equalization

Method and apparatus for monitoring and compensating for skew on a high speed parallel bus

Method and apparatus for automatic clock alignment

Parallel trimming method and apparatus for a voltage controlled delay loop

Statically controlled clock source generator for VCDL clock phase trimming

Multiple phase detection for delay loops

Trimming method and apparatus for voltage controlled delay loop with central interpolator

AGERE SYST GUARDIAN CORP

Synchronizing data transfer protocol across high voltage interface

Telecom service identification resonator apparatus and technique

Impedance matching with sigma delta filter

Telecom service identification transponder apparatus and technique

LSI CORP

Loss of lock detector for clock and data recovery system

Pattern-based loss of signal detector

SerDes data sampling gear shifter

MOBIN MOHAMMAD S

Method and apparatus for generating early or late sampling clocks for CDR data recovery

Methods and apparatus for evaluating the eye margin of a communications device using a data eye monitor

LUCENT TECHNOLOGIES INC

Distributed gain for audio codec

Second order digital filter requiring only one sigma delta modulator

AZIZ PERVEZ M

Methods and apparatus for determining receiver filter coefficients for a plurality of phases

Method and apparatus for equalization using one or more qualifiers

SINDALOVSKY VLADIMIR

Pattern detector for serializer-deserializer adaptation

CDR with digitally controlled lock to reference

AZIMI KOUROS

Method and apparatus for regulating a power supply of an integrated circuit

DAI XINGDONG

Asynchronous calibration for eye diagram generation

SMITH LANE A

Support stand for a two-wheeled pedal vehicle

TRACY PAUL

Decoupling sampling clock and error clock in a data eye

ABEL CHRISTOPHER J

Method and apparatus for determining one or more channel compensation parameters based on data eye monitoring