Inventor

FASANO BENJAMIN V

US66 patents

⚠️ This page may combine multiple inventors who share the name “FASANO BENJAMIN V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FASANO BENJAMIN V

IBM

Vias and method for making the same in organic board and chip carriers

Coaxial interconnect devices and methods of making the same

Land grid array alignment and engagement design

Method for producing ceramic surfaces with easily removable contact sheets

Compliant high-density land grid array (LGA) connector and method of manufacture

Solid oxide fuel cell having vias and a composite interconnect

Solid oxide fuel cell having a catalytic anode

Ceramic substrate having a sealed layer

Structure for implementing secure multichip modules for encryption applications

Method and apparatus for forming stacked die and substrate structures for increased packing density

Method and structure for implementing secure multichip modules for encryption applications

Method and apparatus for forming stacked die and substrate structures for increased packing density

Multilayer ceramic substrate with anchored pad

Optical color tracer identifier in metal paste that bleed to greensheet

Multilayer ceramic substrate with anchored pad

Coaxial interconnect devices and methods of making the same

Method of making a solid oxide fuel cell with controlled porosity

Method of making an electronic interconnect device

Method and structure to provide balanced mechanical loading of devices in compressively loaded environments

Embedded structures to provide electrical testing for via to via and interface layer alignment as well as for conductive interface electrical integrity in multilayer devices

Pastes for improved substrate dimensional control

Method for in-situ environment sensitive sealing and/or product controlling

Integrated electronic components having conductive filled through holes

Interposer with lattice construction and embedded conductive metal structures

Interposer with lattice construction and embedded conductive metal structures

Laser die and photonics die package

Method and structure for implementing secure multichip modules for encryption applications

Chip package having chip extension and method

Method and materials for increasing the strength of crystalline ceramic

Method and structure to wire electronic devices

Low loss glass ceramic composition with modifiable dielectric constant

Method and structure to increase reliability of input/output connections in electrical devices

Low loss glass ceramic composition with modifiable dielectric constant

Interposer with lattice construction and embedded conductive metal structures

Validation of mechanical connections

Optical color tracer indentifier in metal paste that bleed to greensheet

Electrostatic patterning of multi-layer module lamina

Fill head interface with combination vacuum pressure chamber

Aluminum nitride body having graded metallurgy

Aluminum nitride body having graded metallurgy

GLOBALFOUNDRIES INC

Photonic die fan out package with edge fiber coupling interface and related methods

Structure for establishing interconnects in packages using thin interposers

Method for establishing interconnects in packages using thin interposers

PIC die packaging using magnetics to position optical element

ANDRY PAUL S

Silicon carrier optoelectronic packaging

Silicon carrier optoelectronic packaging

GLOBALFOUNDRIES US INC

Microelectronics package with ultra-low-K dielectric region between stacked antenna elements

Integrated circuit structure with optical absorber layer over optical grating coupler

CARBORUNDUM CO

Low temperature sintering route for aluminum nitride ceramics

CRYSTALLINE MATERIALS CORP

Low temperature sintered, resistive aluminum nitride ceramics