Inventor · disambiguated record
Janakiramanan Vaidyanathan
Also filed as: VAIDYANATHAN JANAKIRAMANAN
8 granted patents·1 pending application·77 citations·filing 2007–2024
82Inventor score
Top patents by PatentIndex Score
9 records- 0192US7613882B1Fast invalidation for cache coherency in distributed shared memory systemLEAF SYSTEMS 3·Filed 2007·Granted Nov 3, 2009·63 cites·20 claims
- 0287US9832122B2System and method for identification of large-data flowsCISCO TECH INC·Filed 2014·Granted Nov 28, 2017·12 cites·18 claims
- 0380US12388755B2System and method for multi-path load balancing in network fabricsCISCO TECH INC·Filed 2024·Granted Aug 12, 2025·0 cites·20 claims
- 0480US12218846B2System and method for multi-path load balancing in network fabricsCISCO TECH INC·Filed 2024·Granted Feb 4, 2025·0 cites·20 claims
- 0577US10516612B2System and method for identification of large-data flowsCISCO TECH INC·Filed 2017·Granted Dec 24, 2019·2 cites·17 claims
- 0675US11888746B2System and method for multi-path load balancing in network fabricsCISCO TECH INC·Filed 2022·Granted Jan 30, 2024·0 cites·20 claims
- 0767US11528228B2System and method for multi-path load balancing in network fabricsCISCO TECH INC·Filed 2020·Granted Dec 13, 2022·0 cites·15 claims
- 0857US10778584B2System and method for multi-path load balancing in network fabricsCISCO TECH INC·Filed 2014·Granted Sep 15, 2020·0 cites·21 claims
- 0944US2011004729A1Block Caching for Cache-Coherent Distributed Shared Memory3LEAF SYSTEMS INC·Filed 2007·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →