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Inventor
BAHAR RUTH I
US
2 patents
Patents
2 patents
US5347648A
Sep 13, 1994
Ensuring write ordering under writeback cache error conditions
DIGITAL EQUIPMENT CORP
188 citations
97
US5404483A
Apr 4, 1995
Processor and method for delaying the processing of cache coherency transactions during outstanding cache fills
DIGITAL EQUIPMENT CORP
119 citations
96