Inventor

KWAK CHOONG-KEUN

KR56 patents

⚠️ This page may combine multiple inventors who share the name “KWAK CHOONG-KEUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KWAK CHOONG-KEUN

SAMSUNG ELECTRONICS CO LTD

Write driver circuit in phase change memory device and method for applying write current

Semiconductor memory device capable of compensating for leakage current

Data read circuit for use in a semiconductor memory and a memory thereof

Phase-change memory device and method of writing a phase-change memory device

Phase-change memory device and method of writing a phase-change memory device

Phase change random access memory (PRAM) device having variable drive voltages

Control of set/reset pulse in response to peripheral temperature in PRAM device

Phase change random access memory device having variable drive voltage circuit

Method for programming phase-change memory array to set state and circuit of a phase-change memory device

Phase-change semiconductor memory device and method of programming same

Phase change random access memory (PRAM) device

Reference voltage generating circuit using active resistance device

Parallel test circuit for semiconductor memory

Burn-in circuit and method therefor of semiconductor memory device

Magnetic memory device and method of fabricating the same

Phase change memory devices employing cell diodes and methods of fabricating the same

Semiconductor memory device decoder

Redundancy circuit of a semiconductor memory device

Data buffer circuit with delay circuit to increase the length of a switching transition period during data signal inversion

Nonvolatile memory device and related methods of operation

Phase change memory device using multiprogramming method

Nonvolatile memory devices having enhanced bit line and/or word line driving capability

Redundancy circuit in semiconductor memory device having a multiblock structure

Mode entrance control circuit and mode entering method in semiconductor memory device

Control of set/reset pulse in response to peripheral temperature in PRAM device

Initial firing method and phase change memory device for performing firing effectively

Data read circuit for use in a semiconductor memory and a method therefor

Layout method of latch-up prevention circuit of a semiconductor device

Integrated circuit capable of being burn-in tested using an alternating current stress and a testing method using the same

Semiconductor memory device having a redundancy circuit

Circuit and method for write recovery control

Semiconductor memory device with redundancy structure suppressing power consumption

Semiconductor memory device with function of repairing stand-by current failure

Bit line precharge circuit

Semiconductor memory device and test method therof

Input buffer circuit for semiconductor device

Semiconductor memory device having reduced chip select output time

Phase change memory devices employing cell diodes and methods of fabricating the same

Memory devices and memory systems having the same

Layout method of a semiconductor memory device

Layout structures in semiconductor memory devices including bit line layout for higher density migration

Semiconductor memory device and core layout thereof

Initial firing method and phase change memory device for performing firing effectively

Memory cell array biasing method and a semiconductor memory device

Magnetic memory device and method of fabricating the same

Semiconductor memory device for low power consumption

Data output circuits having enhanced ESD resistance and related methods

Memory cell array biasing method and a semiconductor memory device

Nonvolatile memory device and related methods of operation

SAMSUNE ELECTRONICS CO LTD

Static random access memory device with burn-in test circuit