Inventor
MEHRA RENU
US5 patents
Patents
5 patentsUS6247134B1Jun 12, 2001
Method and system for pipe stage gating within an operating pipelined circuit for power savings
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US6810482B1Oct 26, 2004
System and method for estimating power consumption of a circuit thourgh the use of an energy macro table
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US6038381AMar 14, 2000
Method and system for determining a signal that controls the application of operands to a circuit-implemented function for power savings
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US11449660B1Sep 20, 2022
Method to perform secondary-PG aware buffering in IC design flow
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US11947885B1Apr 2, 2024
Low-power static signoff verification from within an implementation tool
SYNOPSYS INC0 citations55