Inventor
KURJANOWICZ WLODEK
CA37 patents
⚠️ This page may combine multiple inventors who share the name “KURJANOWICZ WLODEK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SIDENSE CORP
16 patentsUS7402855B2Jul 22, 2008
Split-channel antifuse array architecture
SIDENSE CORP109 citations99
US7764532B2Jul 27, 2010
High speed OTP sensing scheme
SIDENSE CORP93 citations98
US8369166B2Feb 5, 2013
Redundancy system for non-volatile memory
SIDENSE CORP69 citations97
US9123572B2Sep 1, 2015
Anti-fuse memory cell
SIDENSE CORP19 citations92
US7755162B2Jul 13, 2010
Anti-fuse memory cell
SIDENSE CORP37 citations92
US7642138B2Jan 5, 2010
Split-channel antifuse array architecture
SIDENSE CORP34 citations92
US7511982B2Mar 31, 2009
High speed OTP sensing scheme
SIDENSE CORP28 citations92
US8026574B2Sep 27, 2011
Anti-fuse memory cell
SIDENSE CORP13 citations84
US8023338B2Sep 20, 2011
Dual function data register
SIDENSE CORP8 citations84
US7944727B2May 17, 2011
Mask programmable anti-fuse architecture
SIDENSE CORP8 citations84
US7817456B2Oct 19, 2010
Program lock circuit for a mask programmable anti-fuse memory array
SIDENSE CORP12 citations84
US7940595B2May 10, 2011
Power up detection system for a memory device
SIDENSE CORP6 citations74
US8735297B2May 27, 2014
Reverse optical proximity correction method
SIDENSE CORP4 citations73
US9870810B2Jan 16, 2018
Method and system for power signature suppression in memory devices
SIDENSE CORP0 citations52
US9123429B2Sep 1, 2015
Redundancy system for non-volatile memory
SIDENSE CORP1 citations51
US8654598B2Feb 18, 2014
Redundancy system for non-volatile memory
SIDENSE CORP1 citations51
KURJANOWICZ WLODEK
13 patentsUS8526254B2Sep 3, 2013
Test cells for an unprogrammed OTP memory array
KURJANOWICZ WLODEK61 citations98
US8933492B2Jan 13, 2015
Low VT antifuse device
KURJANOWICZ WLODEK25 citations92
US8283751B2Oct 9, 2012
Split-channel antifuse array architecture
KURJANOWICZ WLODEK21 citations92
US8213211B2Jul 3, 2012
High reliability OTP memory
KURJANOWICZ WLODEK26 citations92
US9129687B2Sep 8, 2015
OTP memory cell having low current leakage
KURJANOWICZ WLODEK15 citations84
US8767433B2Jul 1, 2014
Methods for testing unprogrammed OTP memory
KURJANOWICZ WLODEK13 citations84
US8471355B2Jun 25, 2013
AND-type one time programmable memory cell
KURJANOWICZ WLODEK9 citations84
US8130532B2Mar 6, 2012
High speed OTP sensing scheme
KURJANOWICZ WLODEK7 citations84
US8059479B2Nov 15, 2011
Test circuit for an unprogrammed OTP memory array
KURJANOWICZ WLODEK10 citations84
US8082476B2Dec 20, 2011
Program verify method for OTP memories
KURJANOWICZ WLODEK4 citations74
US8313987B2Nov 20, 2012
Anti-fuse memory cell
KURJANOWICZ WLODEK3 citations63
US8266483B2Sep 11, 2012
Method for operating a register stage of a dual function data register
KURJANOWICZ WLODEK1 citations63
US8223526B2Jul 17, 2012
Low power antifuse sensing scheme with improved reliability
KURJANOWICZ WLODEK5 citations63
ATMOS CORP
7 patentsUS6826069B2Nov 30, 2004
Interleaved wordline architecture
ATMOS CORP41 citations89
US6687146B2Feb 3, 2004
Interleaved wordline architecture
ATMOS CORP19 citations89
US6894941B2May 17, 2005
RAM having dynamically switchable access modes
ATMOS CORP20 citations88
US6549483B2Apr 15, 2003
RAM having dynamically switchable access modes
ATMOS CORP24 citations88
US6584036B2Jun 24, 2003
SRAM emulator
ATMOS CORP27 citations86
US6687177B2Feb 3, 2004
Reference cells with integration capacitor
ATMOS CORP8 citations73
US6611062B2Aug 26, 2003
Twisted wordline strapping arrangement
ATMOS CORP12 citations73