Inventor

BERGER DEANNA POSTLES DUNN

US30 patents

⚠️ This page may combine multiple inventors who share the name “BERGER DEANNA POSTLES DUNN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BERGER DEANNA POSTLES DUNN

IBM

Position-based replacement policy for address synonym management in shared caches

Transparent interleaving of compressed cache lines

Target cache line arbitration within a processor cluster

Cache line compression prediction and adaptive compression

Multi purpose server cache directory

Detecting and mitigating false structure sharing within a cache line

Hot line fairness mechanism favoring software forward progress

Special tracking pool enhancement for core local cache address invalidates

Cross-core invalidation snapshot management

Shadow pointer directory in an inclusive hierarchical cache

Processor cross-core cache line contention management

Preventing extraneous messages when exiting core recovery

System event broadcast synchronization across hierarchical interfaces

Computation and placement of error correcting codes (ECC) in a computing system data cache

Reducing store operation busy times

Cache management using cache scope designation

Monitoring processing time in a shared pipeline

Dual/multi-mode processor pipelines sampling

Dual/multi-mode processor pipeline sampling

Cross-pipe serialization for multi-pipeline processor

BERGER DEANNA POSTLES DUNN

Dynamic trailing edge latency absorption for fetch data forwarded from a shared data/control interface

Diagnostic data collection and storage put-away station in a multiprocessor system

Multiple level linked LRU priority

Cross-pipe serialization for multi-pipeline processor

Reducing store operation busy times

Dynamically altering a pipeline controller mode based on resource availability

AMBROLADZE EKATERINA M

On demand allocation of cache buffer slots

Monitoring processing time in a shared pipeline

Error detection and recovery in a shared pipeline

Managing dataflow in a temporary memory