Inventor

AKKARY HAITHAM

US67 patents

⚠️ This page may combine multiple inventors who share the name “AKKARY HAITHAM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AKKARY HAITHAM

INTEL CORP

Processor having multiple program counters and trace buffers outside an execution pipeline

Method and apparatus for handling speculative memory access operations

Multithreading processor with thread predictor

Method and apparatus for blocking execution of and storing load operations during their execution

Method and apparatus for implementing a single clock cycle line replacement in a data cache unit

Memory disambiguation for large instruction windows

Processor having multiple program counters and trace buffers outside an execution pipeline

Out-of-pipeline trace buffer for holding instructions that may be re-executed following misspeculation

Method and apparatus for blocking execution of and storing load operations during their execution

Cache memory system having data and tag arrays and multi-purpose buffer assembly with multiple line buffers

Translation lookaside buffer that is non-blocking in response to a miss for use within a microprocessor capable of processing speculative instructions

Method and apparatus for signalling a store buffer to output buffered store data for a load operation on an out-of-order execution computer system

Method and apparatus for loading and storing misaligned data on an out-of-order execution computer system

Apparatus and method for maintaining processing consistency in a computer system having multiple processors

Method and apparatus for performing page table walks in a microprocessor capable of processing speculative instructions

Method and apparatus for performing operations based upon the addresses of microinstructions

Prioritized content addressable memory

Memory system for ordering load and store instructions in a processor that performs multithread execution

Method and apparatus for dispatching and executing a load operation to memory

Methods and apparatus for fordwarding buffered store data on an out-of-order execution computer system

Method and apparatus for implementing a non-blocking translation lookaside buffer

Processor having multiple program counters and trace buffers outside an execution pipeline

Method and apparatus for performing a store operation

Method and apparatus for calculating effective memory addresses

Method and apparatus for performing multiple load operations to the same memory location in a computer system

Computer system that maintains processor ordering consistency by snooping an external bus for conflicts during out of order execution of memory access instructions

Method and apparatus for handling code segment violations in a computer system

Method and apparatus for performing load operations in a computer system

Method and apparatus for preventing incorrect fetching of an instruction of a self-modifying code sequence with dependency on a bufered store

Method and apparatus for executing and dispatching store operations in a computer system

Coordinating access to memory locations for hardware transactional memory transactions and software transactional memory transactions

Memory disambiguation for large instruction windows

ACCEPTTO CORP

System and method to identify abnormalities to continuously measure transaction risk

System and method to identify user and device behavior abnormalities to continuously measure transaction risk

Dynamic authorization with adaptive levels of assurance

Continuous authentication through orchestration and risk calculation post-authorization system and method

Authentication policy orchestration for a user device

System and method for secure pair and unpair processing using a dynamic level of assurance (LOA) score

System and method of biobehavioral derived credentials identification

Authentication and authorization through derived behavioral credentials using secured paired communication devices

Authentication policy orchestration for a user device

Method and system for consumer based access control for identity information

Hierarchical multi-transaction policy orchestrated authentication and authorization

System and method for continuous authentication of user entity identity using context and behavior for real-time modeling and anomaly detection

Authentication policy orchestration for a user device

SHAHIDZADEH NAHAL

Method and system for consumer based access control for identity information

Dynamic authorization with adaptive levels of assurance

INTEL CORPORAITON

Methods and apparatus for caching data in a non-blocking manner using a plurality of fill buffers

MIFRONTIERS CORP

Method and system for processing big data

AKKARY HAITHAM

Late lock acquire mechanism for hardware lock elision (HLE)