Inventor

BEASOM JAMES D

US105 patents

⚠️ This page may combine multiple inventors who share the name “BEASOM JAMES D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BEASOM JAMES D

HARRIS CORP

High frequency analog transistors, method of fabrication and circuit implementation

Self-aligned channel stop for trench-isolated island

Formation of dual polarity source/drain extensions in lateral complementary channel MOS architectures

High voltage lateral semiconductor device

High frequency analog transistors, method of fabrication and circuit implementation

Biasing of island-surrounding material to suppress reduction of breakdown voltage due to field plate acting on buried layer/island junction between high and low impurity concentration regions

Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps

Voltage divider and use as bias network for stacked transistors

Trench resistor architecture

Integrated circuit with improved reverse bias breakdown

Thin, dielectrically isolated island resident transistor structure having low collector resistance

Trench conductor and crossunder architecture

Method of making trench conductor and crossunder architecture

Method of making a high breakdown active device structure with low series resistance

Trench conductor and crossunder architecture

High breakdown active device structure with low series resistance

High voltage lateral MOS structure with depleted top gate region

Conductivity modulated semiconductor structure

Integrated amplifier with adjustable offset voltage

Process of fabricating junction isolated IGFET and bipolar transistor integrated circuit by diffusion

High frequency analog transistors method of fabrication and circuit implementation

Low top gate resistance JFET structure

Power switched logic gates

Method of making silicon MESFET for dielectrically isolated integrated circuits

Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps

Self-aligned channel stop for trench-isolated island

IC which eliminates support bias influence on dielectrically isolated components

Method of fabrication bipolar transistor with improved base collector breakdown voltage and collector series resistance

Method for making a diffused back-side layer on a bonded-wafer with a thick bond oxide

Punch-through diodes and applications

Level shifter stage with punch through diode

Process for doping two levels of a double poly bipolar transistor after formation of second poly layer

Process for doping two levels of a double poly bipolar transistor after formation of second poly layer

Method of making JFET structures for semiconductor devices with complementary bipolar transistors

Method of making an integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps

INTERSIL INC

Lateral DMOS structure with lateral extension structure for reduced charge trapping in gate oxide

Base for a NPN bipolar transistor

Integrated circuit with a PN junction diode

Method of manufacturing lateral MOSFET structure of an integrated circuit having separated device regions

Integrated circuit with a MOS structure having reduced parasitic bipolar transistor action

Integrated circuit having a device wafer with a diffused doped backside layer

Lateral MOSFET structure of an integrated circuit having separated device regions

Bipolar transistor for an integrated circuit having variable value emitter ballast resistors

MOS integrated circuit with reduced on resistance

Integrated circuit with a MOS structure having reduced parasitic bipolar transistor action

Semiconductor device with a reduced mask count buried layer

Device with patterned wells and method for forming same

MOS integrated circuit with reduced ON resistance

(unassigned)

Breakdown improvement method and sturcture for lateral DMOS device

INTERSIL CORP

Semiconductor device with increased maximum terminal voltage