Inventor

SCHEUERLEIN ERIC

US3 patents

Patents

3 patents

US7472030B2Dec 30, 2008

Dual mode single temperature trimming

NAT SEMICONDUCTOR CORP27 citations85

US7230472B1Jun 12, 2007

Base current cancellation for bipolar junction transistor current summing bias voltage generator

NAT SEMICONDUCTOR CORP4 citations59

US7480190B1Jan 20, 2009

Known default data state EPROM

NAT SEMICONDUCTOR CORP0 citations37