Inventor
SAH SUNEETA
US16 patents
⚠️ This page may combine multiple inventors who share the name “SAH SUNEETA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
12 patentsUS9934143B2Apr 3, 2018
Mapping a physical address differently to different memory devices in a group
INTEL CORP77 citations98
US9104595B2Aug 11, 2015
Selective remedial action based on category of detected error for a memory read
INTEL CORP51 citations93
US7047374B2May 16, 2006
Memory read/write reordering
INTEL CORP87 citations93
US10146711B2Dec 4, 2018
Techniques to access or operate a dual in-line memory module via multiple data channels
INTEL CORP14 citations84
US9269436B2Feb 23, 2016
Techniques for determining victim row addresses in a volatile memory
INTEL CORP7 citations81
US10592445B2Mar 17, 2020
Techniques to access or operate a dual in-line memory module via multiple data channels
INTEL CORP2 citations73
US9910604B2Mar 6, 2018
Refresh parameter-dependent memory refresh management
INTEL CORP4 citations73
US9824754B2Nov 21, 2017
Techniques for determining victim row addresses in a volatile memory
INTEL CORP3 citations70
US9436632B2Sep 6, 2016
Accessing data stored in a command/address register device
INTEL CORP3 citations70
US6145062ANov 7, 2000
Selective conflict write flush
INTEL CORP14 citations69
US9269417B2Feb 23, 2016
Memory refresh management
INTEL CORP2 citations62
US7500029B2Mar 3, 2009
Maximal length packets
INTEL CORP0 citations39