Inventor
THAYER LARRY JAY
US5 patents
Patents
5 patentsUS7227797B2Jun 5, 2007
Hierarchical memory correction system and method
HEWLETT PACKARD DEVELOPMENT CO43 citations90
US7307902B2Dec 11, 2007
Memory correction system and method
HEWLETT PACKARD DEVELOPMENT CO7 citations70
US6943804B2Sep 13, 2005
System and method for performing BLTs
HEWLETT PACKARD DEVELOPMENT CO4 citations61
US6876224B2Apr 5, 2005
Method and apparatus for high speed bus having adjustable, symmetrical, edge-rate controlled, waveforms
HEWLETT PACKARD DEVELOPMENT CO5 citations60
US7599235B2Oct 6, 2009
Memory correction system and method
HEWLETT PACKARD DEVELOPMENT CO3 citations59