Inventor

MIAO XIN

US326 patents

⚠️ This page may combine multiple inventors who share the name “MIAO XIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MIAO XIN

IBM

Nanosheet MOSFET with full-height air-gap spacer

Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain

Vertical field effect transistor having U-shaped top spacer

Transistor with air spacer and self-aligned contact

Atomic layer deposition sealing integration for nanosheet complementary metal oxide semiconductor with replacement spacer

MOSFET with asymmetric self-aligned contact

Air gap spacer between contact and gate region

Nanosheet electrostatic discharge structure

Nanosheet transistor with high-mobility channel

Integration of thick and thin nanosheet transistors on a single chip

Vertical FETs with different gate lengths and spacer thicknesses

Single-electron transistor with wrap-around gate

Vertical FET with reduced parasitic capacitance

Flipped vertical field-effect-transistor

Vertical transport FET devices with uniform bottom spacer

Self-aligned source/drain junction for vertical field-effect transistor (FET) and method of forming the same

Method for fabricating a semiconductor device including gate-to-bulk substrate isolation

FinFETs with controllable and adjustable channel doping

Vertical transistor with uniform bottom spacer formed by selective oxidation

Vertical field effect transistors with bottom contact metal directly beneath fins

Integrated etch stop for capped gate and method for manufacturing the same

Integration of vertical transistors with 3D long channel transistors

Structure and method to minimize junction capacitance in nano sheets

Vertical transistor with back bias and reduced parasitic capacitance

Fabrication of a vertical transistor with self-aligned bottom source/drain

Method for making nanosheet CMOS device integrating atomic layer deposition process and replacement gate structure

Nanosheet MOSFET with full-height air-gap spacer

Split fin field effect transistor enabling back bias on fin type field effect transistors

Top contact resistance measurement in vertical FETs

Integrated strained stacked nanosheet FET

Nanosheet MOSFET with full-height air-gap spacer

Stacked nanowire device width adjustment by gas cluster ion beam (GCIB)

Gate spacer and inner spacer formation for nanosheet transistors having relatively small space between gates

Bottom dielectric isolation structure for nanosheet containing devices

I/O device scheme for gate-all-around transistors

Self-aligned top spacers for vertical FETs with in situ solid state doping

Nanosheet mosfet with isolated source/drain epitaxy and close junction proximity

Self-aligned gate cut in direct stacked vertical transport field effect transistor (VTFET)

Nanosheet transistor gate structure having reduced parasitic capacitance

Nanosheet semiconductor structure with inner spacer formed by oxidation

Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain

Vertical field effect transistors with self aligned source/drain junctions

Self-aligned source/drain contact for vertical field effect transistor

Nanosheet substrate isolation scheme by lattice matched wide bandgap semiconductor

Nanosheet devices with different types of work function metals

Vertical fin field effect transistor with integral U-shaped electrical gate connection

H-shaped VFET with increased current drivability

NAMSARAEV EUGENI A

DNA ligation on RNA template

INET TECHNOLOGIES INC

System and method for monitoring signaling units on A-interface links in a GSM network

MAMMOTH BIOSCIENCES INC

Programmable nuclease compositions and methods of use thereof