P

Inventor

FAN FU-JIER

TW49 patents
⚠️ This page may combine multiple inventors who share the name “FAN FU-JIER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAIWAN SEMICONDUCTOR MFG CO LTD

28 patents
US10050033B1Aug 14, 2018

High voltage integration for HKMG technology

TAIWAN SEMICONDUCTOR MFG CO LTD18 citations94
US11410995B1Aug 9, 2022

Semiconductor structure and method of forming thereof

TAIWAN SEMICONDUCTOR MFG CO LTD6 citations85
US11063038B2Jul 13, 2021

Through silicon via design for stacking integrated circuits

TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84
US10964692B2Mar 30, 2021

Through silicon via design for stacking integrated circuits

TAIWAN SEMICONDUCTOR MFG CO LTD5 citations84
US10629592B2Apr 21, 2020

Through silicon via design for stacking integrated circuits

TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84
US10516029B2Dec 24, 2019

Dishing prevention dummy structures for semiconductor devices

TAIWAN SEMICONDUCTOR MFG CO LTD4 citations84
US10340357B2Jul 2, 2019

Dishing prevention dummy structures for semiconductor devices

TAIWAN SEMICONDUCTOR MFG CO LTD9 citations84
US11705449B2Jul 18, 2023

Through silicon via design for stacking integrated circuits

TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US11302691B2Apr 12, 2022

High voltage integration for HKMG technology

TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US10950708B2Mar 16, 2021

Dishing prevention dummy structures for semiconductor devices

TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US10790279B2Sep 29, 2020

High voltage integration for HKMG technology

TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US10510750B2Dec 17, 2019

High voltage integration for HKMG technology

TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US9853149B1Dec 26, 2017

Floating grid and crown-shaping poly for improving ILD CMP dishing

TAIWAN SEMICONDUCTOR MFG CO LTD2 citations73
US10937785B2Mar 2, 2021

Semiconductor device

TAIWAN SEMICONDUCTOR MFG CO LTD2 citations72
US12500193B2Dec 16, 2025

Semiconductor device

TAIWAN SEMICONDUCTOR MFG CO LTD1 citations64
US11646308B2May 9, 2023

Through silicon via design for stacking integrated circuits

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations63
US12100706B2Sep 24, 2024

Semiconductor structure and method of forming thereof

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11710712B2Jul 25, 2023

Semiconductor device and manufacturing method of the same

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11569363B2Jan 31, 2023

Dishing prevention dummy structures for semiconductor devices

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US10937891B2Mar 2, 2021

Spacer structure and manufacturing method thereof

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11417649B2Aug 16, 2022

Semiconductor device

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US11004844B2May 11, 2021

Recessed STI as the gate dielectric of HV device

TAIWAN SEMICONDUCTOR MFG CO LTD1 citations61
US10916542B2Feb 9, 2021

Recessed STI as the gate dielectric of HV device

TAIWAN SEMICONDUCTOR MFG CO LTD1 citations61
US12272686B2Apr 8, 2025

Semiconductor structure and manufacturing method of the same

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10868141B2Dec 15, 2020

Spacer structure and manufacturing method thereof

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US12414361B2Sep 9, 2025

Method of manufacturing a semiconductor device

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations51
US10325964B2Jun 18, 2019

OLED merged spacer device

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations39
US10164037B2Dec 25, 2018

Semiconductor device structure and method for forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations39

TAIWAN SEMICONDUCTOR MFG

20 patents
US6605524B1Aug 12, 2003

Bumping process to increase bump height and to create a more robust bump structure

TAIWAN SEMICONDUCTOR MFG78 citations98
US6482669B1Nov 19, 2002

Colors only process to reduce package yield loss

TAIWAN SEMICONDUCTOR MFG81 citations98
US6426281B1Jul 30, 2002

Method to form bump in bumping technology

TAIWAN SEMICONDUCTOR MFG147 citations98
US6586323B1Jul 1, 2003

Method for dual-layer polyimide processing on bumping technology

TAIWAN SEMICONDUCTOR MFG76 citations97
US6632700B1Oct 14, 2003

Method to form a color image sensor cell while protecting the bonding pad structure from damage

TAIWAN SEMICONDUCTOR MFG58 citations96
US6956292B2Oct 18, 2005

Bumping process to increase bump height and to create a more robust bump structure

TAIWAN SEMICONDUCTOR MFG37 citations92
US6936923B2Aug 30, 2005

Method to form very a fine pitch solder bump using methods of electroplating

TAIWAN SEMICONDUCTOR MFG23 citations92
US6876049B2Apr 5, 2005

Colors only process to reduce package yield loss

TAIWAN SEMICONDUCTOR MFG12 citations92
US6649507B1Nov 18, 2003

Dual layer photoresist method for fabricating a mushroom bumping plating structure

TAIWAN SEMICONDUCTOR MFG33 citations92
US6583039B2Jun 24, 2003

Method of forming a bump on a copper pad

TAIWAN SEMICONDUCTOR MFG37 citations92
US6372545B1Apr 16, 2002

Method for under bump metal patterning of bumping process

TAIWAN SEMICONDUCTOR MFG22 citations92
US6958546B2Oct 25, 2005

Method for dual-layer polyimide processing on bumping technology

TAIWAN SEMICONDUCTOR MFG45 citations90
US7183598B2Feb 27, 2007

Colors only process to reduce package yield loss

TAIWAN SEMICONDUCTOR MFG10 citations84
US7323784B2Jan 29, 2008

Top via pattern for bond pad structure

TAIWAN SEMICONDUCTOR MFG14 citations82
US6426283B1Jul 30, 2002

Method for bumping and backlapping a semiconductor wafer

TAIWAN SEMICONDUCTOR MFG10 citations74
US7816169B2Oct 19, 2010

Colors only process to reduce package yield loss

TAIWAN SEMICONDUCTOR MFG5 citations73
US7485906B2Feb 3, 2009

Colors only process to reduce package yield loss

TAIWAN SEMICONDUCTOR MFG2 citations63
US8049295B2Nov 1, 2011

Coupling well structure for improving HVMOS performance

TAIWAN SEMICONDUCTOR MFG2 citations62
US9111957B2Aug 18, 2015

Coupling well structure for improving HVMOS performance

TAIWAN SEMICONDUCTOR MFG0 citations51
US7816214B2Oct 19, 2010

Coupling well structure for improving HVMOS performance

TAIWAN SEMICONDUCTOR MFG0 citations51

CHOU HSUEH-LIANG

1 patent